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參數(shù)資料
| 型號(hào)： | HCS245MS |
| 廠商： | Intersil Corporation |
| 英文描述： | Radiation Hardened Octal Bus Transceiver, Three-State, Non-Inverting(三態(tài),正相,抗輻射八總線收發(fā)器) |
| 中文描述： | 輻射加固八路總線收發(fā)器，三態(tài)，非反相（三態(tài)，正相，抗輻射八總線收發(fā)器） |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 179K |
| 代理商： | HCS245MS |
7-475
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
HCS245MS
Radiation Hardened
Octal Bus Transceiver, Three-State, Non-Inverting
Pinouts
20 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD FINISH C
TOP VIEW
20 PIN CERAMIC FLAT PACK
MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C
TOP VIEW
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
DIR
A0
A1
A2
A3
A4
A6
A5
A7
GND
VCC
B0
B1
B2
OE
B3
B4
B5
B6
B7
2
3
4
5
6
7
8
9
10
1
20
19
18
17
16
15
14
13
12
11
DIR
A0
A1
A2
A3
A4
A6
A7
A5
GND
VCC
OE
B0
B1
B2
B3
B4
B5
B6
B7
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K or 1 Mega-RAD(Si)
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCS245MS is a Radiation Hardened Non-Invert-
ing Octal Bidirectional Bus Transceiver, Three-State,
intended for two-way asynchronous communication between
data busses. The HCS245MS allows data transmission from
the A bus to the B bus or from the B bus to the A bus. The
logic level at the direction input (DIR) determines the data
direction. The output enable input (OE) puts the I/O port in
the high-impedance state when high.
The HCS245MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS245MS is supplied in a 20 lead Weld Seal Ceramic
flatpack (K suffix) or a Weld Seal Ceramic Dual-In-Line
Package (D suffix).
File Number
2468.1
December 1992
Functional Diagram
ONE OF 8 TRANSCEIVERS
B DATA
(18, 17, 16, 15,
14, 13, 12)
DIR
OUTPUT
ENABLE
1
11
19
A DATA
9
(2, 3, 4, 5,
6, 7, 8)
TO OTHER
7 BUFFERS
Truth Table
CONTROL
INPUTS
OPERATION
OE
DIR
L
L
B Data to A Bus
L
H
A Data to B Bus
H
X
Isolation
H = High Voltage Level, L = Low Voltage Level,
X = Immaterial
To prevent excess currents in the High-Z (Isolation)
modes, all I/O terminals should be terminated with 10k
to 1M
resistors.
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