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參數(shù)資料
| 型號： | HCTS75D |
| 廠商： | Intersil Corporation |
| 英文描述： | Quadruple Bus Buffer Gates With 3- State Outputs 14-CFP -55 to 125 |
| 中文描述： | 輻射加固雙2位雙穩(wěn)態(tài)透明鎖存器 |
| 文件頁數(shù)： | 6/9頁 |
| 文件大?。?/td> | 136K |
| 代理商： | HCTS75D |
475
HCTS75MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PIND, Method 2020, Condition A
100% External Visual
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125
o
C min., Method 1015
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125
o
C min., Method 1015
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125
o
C or
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quan-
tity).
Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
X-Ray report and film. Includes penetrometer measurements.
Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
Lot Serial Number Sheet (Good units serial number and lot number).
Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
Spec Number
518625
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PDF描述 |
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| HCTS75DMSR | Quadruple Bus Buffer Gates With 3- State Outputs 20-LCCC -55 to 125 |
| HCTS75K | Quadruple Bus Buffer Gates With 3- State Outputs 14-CDIP -55 to 125 |
| HCTS75KMSR | Quadruple Bus Buffer Gates With 3- State Outputs 14-CFP -55 to 125 |
| HCTS75MS | Quadruple Bus Buffer Gates With 3-State Outputs 20-LCCC -55 to 125 |
| HCTS75HMSR | Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
相關(guān)代理商/技術(shù)參數(shù) |
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| HCTS75DMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75KMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
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