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參數資料
| 型號： | HCTS75D |
| 廠商： | Intersil Corporation |
| 英文描述： | Quadruple Bus Buffer Gates With 3- State Outputs 14-CFP -55 to 125 |
| 中文描述： | 輻射加固雙2位雙穩態透明鎖存器 |
| 文件頁數： | 8/9頁 |
| 文件大小： | 136K |
| 代理商： | HCTS75D |
477
HCTS75MS
Die Characteristics
DIE DIMENSIONS:
89 x 88 mils
2.25 x 2.24mm
METALLIZATION:
Type: SiAl
Metal Thickness: 11k
±
1k
GLASSIVATION:
Type: SiO
2
Thickness: 13k
±
2.6k
WORST CASE CURRENT DENSITY:
<2.0 x 10
5
A/cm
2
BOND PAD SIZE:
100
μ
m x 100
μ
m
4 x 4 mils
Metallization Mask Layout
HCTS75MS
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location.
The mask series for the HCTS75 is TA14442A.
D0 1
(2)
Q0 1
(1)
Q0 1
(16)
D1 1 (3)
E 2 (4)
VCC (5)
D0 2 (6)
(8)
Q1 2
(9)
Q1 2
(10)
Q0 2
(11) 2 Q0
(12) GND
(13) 1 E
(14) 1 Q1
D1 2 (7)
(15) 1 Q1
Spec Number
518625
相關PDF資料 |
PDF描述 |
|---|---|
| HCTS75DMSR | Quadruple Bus Buffer Gates With 3- State Outputs 20-LCCC -55 to 125 |
| HCTS75K | Quadruple Bus Buffer Gates With 3- State Outputs 14-CDIP -55 to 125 |
| HCTS75KMSR | Quadruple Bus Buffer Gates With 3- State Outputs 14-CFP -55 to 125 |
| HCTS75MS | Quadruple Bus Buffer Gates With 3-State Outputs 20-LCCC -55 to 125 |
| HCTS75HMSR | Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HCTS75DMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75KMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
| HCTS75MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Dual 2-Bit Bistable Transparent Latch |
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