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參數資料
| 型號： | HI7190IP |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | null24-Bit, High Precision, Sigma Delta A/D Converter |
| 中文描述： | 1-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDIP20 |
| 封裝： | PLASTIC, MS-001AD, DIP-20 |
| 文件頁數： | 3/24頁 |
| 文件大小： | 187K |
| 代理商： | HI7190IP |
1873
Absolute Maximum Ratings
Thermal Information
Supply Voltage
AV
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+5.5V
AV
SS
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -5.5V
DV
DD
to DGND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V
DGND to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
0.3V
Analog Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . AV
SS
to AV
DD
Digital Input, Output and I/O Pins. . . . . . . . . . . . . . . DGND to DV
DD
ESD Tolerance (No Damage)
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +100V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering, 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
125
100
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
AV
DD
= +5V, AV
SS
= -5V, DV
DD
= +5V, V
RHI
= +2.5V, V
RLO
= AGND = 0V, V
CM
= AGND,
PGIA Gain = 1, OSC
IN
= 10MHz, Bipolar Input Range Selected, f
N
= 10Hz
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
SYSTEM PERFORMANCE
Integral Non-Linearity, INL
End Point Line Method (Notes 3, 5, 6)
-
±
0.0007
±
0.0015
%FS
Differential Non-Linearity
(Note 2)
No Missing codes to 22-Bits
LSB
Offset Error, V
OS
See Table 1
-
-
-
-
Offset Error Drift
V
INHI
= V
INLO
(Notes 3, 8)
-
1
-
μ
V/
o
C
Full Scale Error, FSE
V
INHI
- V
INLO
= +2.5V (Notes 3, 5, 8, 10)
-
-
-
-
Noise, e
N
See Table 1
-
-
-
-
Common Mode Rejection Ratio, CMRR V
CM
= 0V, V
INHI
= V
INLO
from -2V to +2V
-70
-
dB
Normal Mode 50Hz Rejection
Filter Notch = 10Hz, 25Hz, 50Hz (Note 2)
-120
-
-
dB
Normal Mode 60Hz Rejection
Filter Notch = 10Hz, 30Hz, 60Hz (Note 2)
-120
-
-
dB
Step Response Settling Time
-
2
4
Conversions
ANALOG INPUTS
Input Voltage Range
Unipolar Mode (Note 9)
0
-
V
REF
V
Input Voltage Range
Bipolar Mode (Note 9)
- V
REF
-
V
REF
V
Common Mode Input Range
(Note 2)
AV
SS
-
AV
DD
V
Input Leakage Current, I
IN
V
IN
= AV
DD
(Note 2)
-
-
1.0
nA
Input Capacitance, C
IN
-
5.0
-
pF
Reference Voltage Range, V
REF
(V
REF
= V
RHI
- V
RLO
)
2.5
-
5
V
Transducer Burn-Out Current, I
BO
-
200
-
nA
CALIBRATION LIMITS
Positive Full Scale Calibration Limit
-
-
1.2(V
REF
/Gain)
-
Negative Full Scale Calibration Limit
-
-
1.2(V
REF
/Gain)
-
Offset Calibration Limit
-
-
1.2(V
REF
/Gain)
-
Input Span
0.2(V
REF
/Gain)
-
2.4(V
REF
/Gain)
-
DIGITAL INPUTS
Input Logic High Voltage, V
IH
(Note 11)
2.0
-
-
V
Input Logic Low Voltage, V
IL
-
-
0.8
V
Input Logic Current, I
I
V
IN
= 0V, +5V
-
1.0
10
μ
A
HI7190
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