
The information contained in this section has been developed through characterization by Intersil Semiconductor and is for use as
application and design information only. No guarantee is implied.
11
Semiconductor
Background Information HS-6617RH Programming
PROGRAMMING SPECIFICATIONS
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
Input "0"
VIL
0.0
0.2
0.8
V
Voltage "1"
VIH
VDD-2
VDD
VDD+0.3
V
6
Programming VDD
VDDPROG
10.0
10.0
10.0
V
2
Operating VDD
VDD1
4.5
5.5
5.5
V
Special Verify
VDD2
4.0
-
6.0
V
3
Delay Time
td
1.0
1.0
-
μ
s
Rise Time
tr
1.0
10.0
10.0
μ
s
Fall Time
tf
1.0
10.0
10.0
μ
s
Chip Enable Pulse Width
TEHEL
50
-
-
ns
Address Valid to Chip Enable Low Time
TAVEL
20
-
-
ns
Chip Enable Low to Output Valid Time
TELQV
-
-
120
ns
Programming Pulse Width
tpw
90
100
110
μ
s
4
Input Leakage at VDD = VDDPROG
tIP
-10
+1.0
10
μ
A
Data Output Current at VDD = VDDPROG
IOP
-
-5.0
-10
mA
Output Pull-Up Resistor
Rn
5
10
15
k
5
Ambient Temperature
T
A
-
25
-
o
C
NOTES:
1. All inputs must track VDD (pin 24) within these limits.
2. VDDPROG must be capable of supplying 500mA. VDDPROG Power Supply tolerence
±
3% (Max.)
3. See Steps 22 through 29 of the Programming Algorithm.
4. See Step 11 of the Programming Algorithm.
5. All outputs should be pulled up to VDD through a resistor of value Rn.
6. Except during programming (See Programming Cycle Waveforms).
HS-6617RH
2K x 8 CMOS PROM
Spec Number
518742
DESIGN INFORMATION
July 1995