
13
Signal Status Page
Transmit Preamble Information
SERVICE FIELD CR51<7:0>
This control register contains the value of the service field to
be transmitted in a Header.
LENGTH FIELD CR52<7:0> CR53<7:0>
These control registers contain the value of the length field
to be transmitted. It indicates the number of bits transmitted
in the data packet.
CRC16 FIELD CR54<7:0> CR55<7:0>
These status registers indicate the calculated CRC16 for the
transmitted header.
Receive Preamble Information
SERVICE FIELD CR44<7:0>
This status register contains the value of the service field
received in a Header.
LENGTH FIELD CR45<7:0> CR46<7:0>
These status registers contain the value of the length field of
the received packet. It indicates the number of bits
transmitted in the data packet.
CRC16 FIELD CR47<7:0> CR48<7:0>
These status registers indicate the received CRC16 for the
received header.
Signal Field
BPSK CR42<7:0>
This control register contains the 8-bit value indicating that
the data packet modulation is DBPSK.
QPSK CR43<7:0>
This control register contains the 8-bit value indicating that
the data packet modulation is DQPSK.
Receive Signal Quality Indicators
BIT SYNC AMPLITUDE ACQUISITION CR24<6:0>
CR25<7:0>
These status registers contain the measured bit sync
amplitude signal quality during acquisition.
BIT SYNC AMPLITUDE DATA CR28<6:0> CR29<7:0>
These status registers contain the measured bit sync
amplitude signal quality during data tracking.
PHASE VARIANCE ACQUISITION CR32<7:0> CR33<7:0>
These status registers contain the measured phase variance
signal quality during acquisition.
PHASE VARIANCE DATA CR36<7:0> CR37<7:0>
These status registers contain the measured phase variance
signal quality during data tracking.
RSSI VALUE CR10<5:0>
These status bits contain the value of the RSSI analog input
signal from the on-chip ADC. This register is updated at the
chip rate divided by 11.
RECEIVE SIGNAL QUALITY FOR BEST ANTENNA
DWELL CR38<7:0>
This status register contains the bit sync amplitude signal
quality measurement derived from the Bit Sync signal quality
stored in the CR28-29 registers of the HSP3824. This value
is the result of the signal quality measurement for the best
antenna dwell in the antenna diversity mode.
PREAMBLE/HEADER
MODEM STATUS
SIGNAL STATUS
THRESHOLD SETTINGS
MODEM CONFIGURATION
I/0 CONFIGURATION
TEST PORT CONFIGURATION
EXIT
DOWNLOAD
2:33 PM
BDO:
A/D CALIBRATION
PREAMBLE INFORMATION
TRANSMITTER
SERVICE FIELD
DURATION
LENGTH FIELD
CRC16 FIELD
RECEIVER
00
0000 0000
0800
0000 1000 0000 0000
SIGNAL FIELD
DBPSK
QA
0000 1010
0001 0100
QPPSK
14
Rx SIGNAL QUALITY INDICATORS
0000
0000
0000 0000 0000 0000
0000 0000 0000 0000
0000
0000
0000 0000 0000 0000
0000 0000 0000 0000
DURING ACQUISITION
DURING DATA
RX_SQ_1
RX_SQ_2
MISCELLANEOUS
RSSI VALUE
00
0000 0000
RX_SQ_READ
00
0000 0000
Application Note 9615