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參數資料
型號: HY27USxxx
廠商: Hynix Semiconductor Inc.
英文描述: 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
中文描述: 512兆(64Mx8bit / 32Mx16bit)NAND閃存
文件頁數: 17/43頁
文件大小: 729K
代理商: HY27USXXX
Rev 0.6 / Oct. 2004
17
HY27SS(08/16)121M Series
HY27US(08/16)121M Series
512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
Page Program
The Page Program operation is the standard operation to program data to the memory array. The main area of the
memory array is programmed by page, however partial page programming is allowed where any number of bytes (1 to
528) or words (1 to 264) can be programmed.
The max number of consecutive partial page program operations allowed in the same page is one in the main area and
two in the spare area. After exceeding this a Block Erase command must be issued before any further program opera-
tions can take place in that page.
Before starting a Page Program operation a Pointer operation can be performed to point to the area to be pro-
grammed. Refer to the Pointer Operations section and Figure 9 for details.
Each Page Program operation consists of five steps (see Figure 14):
1. one bus cycle is required to setup the Page Program command
2. four bus cycles are then required to input the program address (refer to Table 3)
3. the data is then input (up to 528 Bytes/ 264 Words) and loaded into the Page Buffer
4. one bus cycle is required to issue the confirm command to start the Program/ Erase/Read Controller.
5. The Program/ Erase/Read Controller then programs the data into the array.
Once the program operation has started the Status Register can be read using the Read Status Register command.
During program operations the Status Register will only flag errors for bits set to '1' that have not been successfully
programmed to '0'.
During the program operation, only the Read Status Register and Reset commands will be accepted, all other com-
mands will be ignored.
Once the program operation has completed the Program/ Erase/Read Controller bit SR6 is set to '1' and the Ready/
Busy signal goes High.
The device remains in Read Status Register mode until another valid command is written to the Command Interface.
Note: Before starting a Page Program operation a Pointer operation can be performed. Refer to Pointer section for details.
Figure 14. Page Program Operation
Address Inputs
I/O
80h
Page Program
Setup Code
Data Input
10h
70h
SR0
Confirm
Code
Read Status Register
Busy
tBLBH2
(Program Busy time)
RB
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HY27US16121M 512Mbit (64Mx8bit / 32Mx16bit) NAND Flash
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