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參數資料
| 型號： | HYB 39S16160CT-7 |
| 廠商： | SIEMENS AG |
| 英文描述： | 1M × 16-Mbit Synchronous DRAM for High-Speed Graphics Applications(16M位(1M × 16)同步動態RAM(用于高速圖形場合)) |
| 中文描述： | 100萬× 16高兆同步DRAM高速圖形應用程序（1,600位（1米× 16）同步動態隨機存儲器（用于高速圖形場合）） |
| 文件頁數： | 1/19頁 |
| 文件大小： | 110K |
| 代理商： | HYB 39S16160CT-7 |
HYB 39S16160CT-5.5/-6/-7
16-MBit Synchronous DRAM
Data Book
1
09.99
The HYB 39S16160CT-5.5/-6/-7 are high-speed dual-bank Synchronous DRAM’s organized as
2 banks
×
512 kbit
×
16. These synchronous devices achieve high-speed data transfer rates up to
183 MHz by employing a chip architecture that prefetches multiple bits and then synchronizes the
output data to a system clock. The chip is fabricated using the Infineon advanced 16 MBit DRAM
process technology.
The device is designed to comply with all JEDEC standards set for Synchronous DRAM products,
both electrically and mechanically. All of the control, address, data input and output circuits are
synchronized with the positive edge of an externally supplied clock.
Operating the two memory banks in an interleaved fashion allows random access operation to
occur at higher rates than is possible with standard DRAMs. A sequential and gapless data rate of
up to 183 MHz is possible depending on burst length, CAS latency and speed grade of the device.
Auto Refresh (CBR) and Self Refresh operation are supported. These devices operate with a single
3.3 V
±
0.3 V power supply and are available in TSOPII packages.
High Performance:
Fully Synchronous to Positive Clock Edge
0 to 70
°
C operating temperature
Dual Banks controlled by A11 (Bank Select)
Programmable CAS Latency: 2, 3
Programmable Wrap Sequence:
Sequential or Interleave
Programmable Burst Length: 1, 2, 4, 8
Full page (optional) for sequential wrap
around
Multiple Burst Read with Single Write
Operation
Automatic and Controlled Precharge
Command
Data Mask for Read/Write Control
Dual Data Mask for Byte Control (x16)
Auto Refresh (CBR) and Self Refresh
Suspend Mode and Power Down Mode
4096 Refresh Cycles/64 ms
Latency 2 at 133 MHz
Latency 3 at 183 MHz
Random Column Address every CLK
(1-N Rule)
Single 3.3 V
±
0.3 V Power Supply
LVTTL Interface
Plastic Packages:
P-TSOPII-50 400 mil width (x16)
-5.5
-6
-7
Unit
f
CKMAX
@ CL = 3
183
166
143
MHz
t
CK3
5.5
6
7
ns
t
AC3
4.5
5
5
ns
f
CKMAX
@ CL = 2
133
125
115
MHz
t
CK2
7.5
8
9
ns
t
AC2
5.4
6
6
ns
1M
×
16-MBit Synchronous DRAM
for High-Speed Graphics Applications
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PDF描述 |
|---|---|
| HYB 39S256160T | 256-Mbit(4banks × 4MBit × 16) Synchronous DRAM(256M(4列 × 4M位 × 16)同步動態RAM) |
| HYB 39S256400T | 256-Mbit(4banks × 16MBit × 4) Synchronous DRAM(256M(4列 × 16M位 × 4)同步動態RAM) |
| HYB 39S256800T | 256-Mbit(4banks × 8MBit × 8) Synchronous DRAM(256M(4列 × 8M位 × 8)同步動態RAM) |
| HYB 39S256400AT | 256-Mbit(4banks × 16MBit × 4) Synchronous DRAM(256M(4列 × 16M位 × 4)同步動態RAM) |
| HYB 39S256800AT | 256-Mbit(4banks × 8MBit × 8) Synchronous DRAM(256M(4列 × 8M位 × 8)同步動態RAM) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| HYB39S16160CT-7 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:1M x 16 MBit Synchronous DRAM for High Speed Graphics Applications |
| HYB39S16160CT-8 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:16 MBit Synchronous DRAM |
| HYB39S16320TQ-10 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Special Mode Registers Two color registers Burst Read with Single Write Operation |
| HYB39S16320TQ-5.5 | 制造商:Siemens 功能描述:Electronic Component |
| HYB39S16320TQ-6 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:Special Mode Registers Two color registers Burst Read with Single Write Operation |
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