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參數資料
| 型號： | ICS8745AM-21T |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 180K |
| 代理商： | ICS8745AM-21T |
8745AM-21
www.icst.com/products/hiperclocks.html
REV. E APRIL 14, 2003
1
Integrated
Circuit
Systems, Inc.
ICS8745-21
DIFFERENTIAL-TO-LVDS
ZERO DELAY CLOCK GENERATOR
GENERAL DESCRIPTION
The ICS8745-21 is a highly versatile 1:1 LVDS
clock generator and a member of the
HiPerClockS family of High Performance Clock
Solutions from ICS. The ICS8745-21 has a fully
integrated PLL and can be configured as zero
delay buffer, multiplier or divider, and has an output fre-
quency range of 31.25MHz to 700MHz. The Reference
Divider, Feedback Divider and Output Divider are each
programmable, thereby allowing for the following output-
to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8.
The external feedback allows the device to achieve “zero
delay” between the input clock and the output clocks. The
PLL_SEL pin can be used to bypass the PLL for system
test and debug purposes. In bypass mode, the reference
clock is routed around the PLL and into the internal
output dividers.
FEATURES
1 differential LVDS output pair designed to meet
or exceed the requirements of ANSI TIA/EIA-644
1 differential feedback output pair
Differential CLK, nCLK input pair
CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
Output frequency range: 31.25MHz to 700MHz
Input frequency range: 31.25MHz to 700MHz
VCO range: 250MHz to 700MHz
External feedback for “zero delay” clock regeneration
with configurable frequencies
Programmable dividers allow for the following output-to-input
frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8
Cycle-to-cycle jitter: 25ps (maximum)
Static phase offset: 50ps ± 150ps
3.3V supply voltage
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
HiPerClockS
,&6
BLOCK DIAGRAM
PIN ASSIGNMENT
ICS8745-21
20-Lead, 300-MIL SOIC
7.5mm x 12.8mm x 2.3mm body package
M Package
Top View
CLK
nCLK
MR
nFB_IN
FB_IN
SEL2
VDDO
nQFB
QFB
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SEL1
SEL0
VDD
PLL_SEL
VDDA
SEL3
GND
Q
nQ
VDDO
PLL_SEL
CLK
nCLK
FB_IN
nFB_IN
SEL0
SEL1
SEL2
SEL3
MR
PLL
8:1, 4:1, 2:1, 1:1,
1:2, 1:4, 1:8
Q
nQ
QFB
nQFB
0
1
÷1, ÷2, ÷4, ÷8,
÷16, ÷32, ÷64
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相關代理商/技術參數 |
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| ICS8745BM-21LF | 功能描述:IC CLK GEN ZD DIFF-LVDS 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ICS8745BM-21LFT | 功能描述:IC CLK GEN 1:1 DIFF-LVDS 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8745BMI-21LF | 功能描述:IC CLK GEN 1:1 DIFF-LVDS 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:Precision Edge® 類型:時鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數:1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應商設備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ICS8745BMI-21LFT | 功能描述:IC CLK GEN 1:1 DIFF-LVDS 20-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:HiPerClockS™ 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數:- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應商設備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| ICS8745BY | 制造商:ICS 功能描述: 制造商:Integrated Device Technology Inc 功能描述: 制造商:Integrated Device Technology Inc 功能描述:8745 SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
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