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參數資料
| 型號： | ISD5216SERIES |
| 英文描述： | Single-Chip Voice Record/Playback Device |
| 中文描述： | 單芯片語音記錄/播放設備 |
| 文件頁數： | 71/83頁 |
| 文件大小： | 758K |
| 代理商： | ISD5216SERIES |
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I5216 SERIES
Advanced Information
PRELIMINARY
Publication Release Date: November 30, 2001
- 71
Revision A1
I
2
C PROTOCOL
Since the I
2
C protocol allows multiple devices on the bus, each device must have an address. This
address is known as a “Slave Address”. A Slave Address consists of 7 bits, followed by a single bit that
indicates the direction of data flow. This single bit is 1 for a Write cycle, which indicates the data is
being sent from the current bus master to the device being addressed. This single bit is a 0 for a Read
cycle, which indicates that the data is being sent from the device being addressed to the current bus
master.
Before any data is transmitted on the I
2
C interface, the current bus master must address the slave it
wishes to transfer data to or from. The Slave Address is always sent out as the 1
byte following the
Start Condition sequence. An example of a Master transmitting an address to a ISD5216 slave is
shown below. In this case, the Master is writing data to the slave and the R/W bit is “0”, i.e. a Write
cycle. All the bits transferred are from the Master to the Slave, except for the indicated Acknowledge
bits.
Master Transmits to Slave Receiver (Write) Mode
S
W A
A
A
A
P
SLAVE ADDRESS
COMMAND BYTE
High ADDR. BYTE
Low ADDR. BYTE
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
R/W
Start Bit
Stop Bit
A common procedure in the ISD5116 is the reading of the Status Bytes. The Read Status condition in
the ISD5216 is triggered when the Master addresses the chip with its proper Slave Address,
immediately followed by the R/W bit set to a “0” and without the Command Byte being sent. This is an
example of the Master sending to the Slave, immediately followed by the Slave sending data back to
the Master. The “N” not-acknowledge cycle from the Master ends the transfer of data from the Slave.
Master Reads from Slave immediately after first byte (Read Mode)
R/W
From
Master
Start Bit
From
Master
Stop Bit
From
Master
acknowledgement
from slave
acknowledgement
from Master
not-acknowledged
from Master
acknowledgement
from Master
From Master
From Slave
From Slave
From Slave
S
R
A
A
A
N
P
Low ADDR BYTE
SLAVE ADDRESS
STATUS WORD
High ADDR. BYTE
相關PDF資料 |
PDF描述 |
|---|---|
| ISDMICROTAD-16M | |
| ISDNRNYNG | Optoelectronic |
| ISG4042-T | 5V CATV MODEM RF TUNER AND TRANSMITTER |
| ISG4042EU-T | 5V CATV MODEM RF TUNER AND TRANSMITTER |
| ISG52124-L | 5 TO 210 MHz SILICON CATV 24 dB LOW POWER HYBRID AMPLIFIER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISD5216SI | 制造商:WINBOND 制造商全稱:Winbond 功能描述:8 to 16 minutes voice record/playback device with integrated codec |
| ISD5216SY | 功能描述:IC VOICE REC/PLAY 8-16MIN 28SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISL5216 標準包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應商設備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5216SYI | 功能描述:IC VOICE REC/PLAY 8-16MIN 28SOIC RoHS:是 類別:集成電路 (IC) >> 接口 - 語音錄制和重放 系列:ISL5216 標準包裝:14 系列:- 接口:串行 濾波器通頻帶:1.7kHz 持續時間:8 ~ 32 秒 安裝類型:通孔 封裝/外殼:28-DIP（0.300"，7.62mm） 供應商設備封裝:28-PDIP 其它名稱:90-21300+000 |
| ISD5X | 制造商:Isocom Components 功能描述:OPTOCOUPLER DIP-8 DUAL TR. O/P 制造商:Isocom Components 功能描述:Dual opto coupler,ISD5X DIP8 5300Vac |
| ISD5XSM | 制造商:Isocom Components 功能描述:OPTOCOUPLER SMDIP-8 DUAL TR O/P 制造商:Isocom Components 功能描述:OPTOCOUPLER, SMDIP-8, DUAL TR O/P |
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