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參數(shù)資料
| 型號(hào)： | ISP1107 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Advanced Universal Serial Bus transceiver |
| 中文描述： | 先進(jìn)的通用串行總線收發(fā)器 |
| 文件頁數(shù)： | 10/19頁 |
| 文件大小： | 536K |
| 代理商： | ISP1107 |
Philips Semiconductors
ISP1107
Advanced USB transceiver
Objective specification
Rev. 01 — 23 February 2000
10 of 19
9397 750 06899
Philips Electronics N.V. 2000. All rights reserved.
[1]
[2]
Test circuit: see
Figure 10
.
Characterized only, not tested. Limits guaranteed by design.
V
CRS
output signal crossover
voltage
excluding the first transition
from idle state; see
Figure 7
[2]
1.3
-
2.0
V
Driver timing
Full-speed mode
t
PLH(drv)
t
PHL(drv)
t
PHZ
t
PLZ
t
PZH
t
PZL
Low-speed mode
Not specified
: low-speed delay timings are dominated by the slow rise/fall times t
LR
and t
LF
.
Receiver timings (full-speed and low-speed mode)
Differential receiver
t
PLH(rcv)
propagation delay
(D
+
,D
to RCV)
t
PHL(rcv)
HIGH-to-LOW; see
Figure 6
Single-ended receiver
t
PLH(se)
propagation delay
(D
+
,D
to VP, VM)
t
PHL(se)
HIGH-to-LOW; see
Figure 6
driver propagation delay
(VO, FSE0 to D
+
,D
)
LOW-to-HIGH; see
Figure 7
HIGH-to-LOW; see
Figure 7
HIGH-to-OFF; see
Figure 5
LOW-to-OFF; see
Figure 5
OFF-to-HIGH; see
Figure 5
OFF-to-LOW; see
Figure 5
-
-
-
-
-
-
-
-
-
-
-
-
15
15
10
10
15
15
ns
ns
ns
ns
ns
ns
driver disable delay
(OE to D
+
,D
)
driver enable delay
(OE to D
+
,D
)
LOW-to-HIGH; see
Figure 6
-
-
-
-
15
15
ns
ns
LOW-to-HIGH; see
Figure 6
-
-
-
-
15
15
ns
ns
Table 12: Dynamic characteristics: analog I/O pins (D
+
, D
)
[1]
…continued
V
CC
= 4.0 to 5.5 V; V
CC(I/O)
= 1.65 to 3.6 V; V
GND
= 0 V; T
amb
=
40 to
+
85
°
C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Fig 4.
Rise and fall times.
Fig 5.
Timing of OE to D
+
, D
.
Fig 6.
Timing of D
+
, D
to RCV, VP, VM.
Fig 7.
Timing of VO, FSE0 to D
+
, D
.
MGS963
VOL
tFR, tLR
tFF, tLF
VOH
90%
10%
10%
90%
MGS966
VOL
VOH
tPZH
tPZL
tPHZ
tPLZ
VOH
0.3 V
VOL
+
0.3 V
VCRS
0.9 V
0.9 V
1.65 V
0 V
logic input
differential
data lines
MGS965
VOL
VOH
tPHL(rcv)
tPHL(se)
tPLH(rcv)
tPLH(se)
VCRS
VCRS
0.9 V
0.9 V
2.0 V
0.8 V
logic output
differential
data lines
MGS964
VOL
VOH
tPHL(drv)
tPLH(drv)
VCRS
VCRS
0.9 V
0.9 V
1.65 V
0 V
logic input
differential
data lines
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