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參數資料
| 型號： | ISP1109BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Universal Serial Bus transceiver with carkit support |
| 中文描述： | LINE TRANSCEIVER, PQCC32 |
| 封裝： | LEAD FREE, 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT617-1, HVQFN-32 |
| 文件頁數： | 34/59頁 |
| 文件大小： | 295K |
| 代理商： | ISP1109BS |
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9397 750 13355
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 14 July 2005
34 of 59
Philips Semiconductors
ISP1109
USB transceiver with carkit support
10.1 Power-down event
If V
CC(I/O)
is not present and the V
BUS
voltage is below the SESS_VLD threshold
(0.8 V to 2.0 V), the ISP1109 is in Power-down mode and internal clocks are turned off.
The internal clock—LazyClock or I
2
C-bus clock or both—is stopped when bit PWR_DN is
set. It takes approximately 8 ms for the clock to stop from the time the Power-down
condition is detected.
If SPI mode is selected, a register read or write access is normal, as when in Power-down
mode. If I
2
C-bus mode is selected, the internal clock must first be woken up before any
register read or write operation.
10.2 Clock wake-up event
The clock wakes up when any of the following events occurs on ISP1109 pins:
Pin SPI_CLK/I2C_SCL goes LOW, if I
2
C-bus mode is selected (pin SPI_I2C_SEL is
HIGH).
Pin V
BUS
goes above the session valid threshold (0.8 V to 2.0 V), provided
bit SESS_VLD_IEH of the Interrupt Enable High register is set.
Status bit ID_FLOAT changes from logic 1 to logic 0, provided bit ID_FLOAT_IEL of
the Interrupt Enable Low register is set.
Status bit ID_FLOAT changes from logic 0 to logic 1, provided bit ID_FLOAT_IEH of
the Interrupt Enable High register is set.
Status bit SE1 changes from logic 0 to logic 1, provided bit SE1_IEH of the Interrupt
Enable High register is set.
The event triggers the clock to start. A stable clock is guaranteed within 100
μ
s.
When an event is triggered and the clock is started, it will remain active for approximately
8 ms. If bit PWR_DN is not cleared within this 8 ms period, the clock will stop. If the clock
wakes up because of any event other than SPI_CLK/I2C_SCL going LOW, an interrupt
will be generated once the clock is active.
11. Electro-Static Discharge (ESD)
11.1 ESD protection
The pins that are connected to the USB connector—DP, DM, ID, V
BUS
, V
CC
, GNDA and
GNDD—have a minimum of
±
12 kV ESD protection. The
±
12 kV measurement is limited
by the test equipment. Capacitors of 4.7
μ
F connected from REG3V3 to GNDA and V
BUS
to GNDA are required to achieve this
±
12 kV ESD protection. See
Figure 12
.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1109BS,118 | 功能描述:射頻收發器 USB FS TRANSCVR RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1109BS,151 | 功能描述:射頻收發器 DO NOT USE ORDER -T PART RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1109BS,157 | 功能描述:射頻收發器 DO NOT USE ORDER -T PART RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1109BSFE | 功能描述:IC TXRX SERIAL BUS UNIV 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發器 系列:- 標準包裝:2,500 系列:- 類型:驅動器 驅動器/接收器數:4/0 規程:RS422 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:16-SOIC N 包裝:帶卷 (TR) |
| ISP1109BS-S | 功能描述:IC TXRX SERIAL BUS UNIV 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發器 驅動器/接收器數:2/2 規程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應商設備封裝:16-PDIP 包裝:管件 |
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