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參數資料
| 型號： | ISP1130 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Universal Serial Bus compound hub with integrated keyboard controller |
| 中文描述： | 通用串行總線控制器與集成鍵盤復合樞紐 |
| 文件頁數： | 30/68頁 |
| 文件大小： | 1786K |
| 代理商： | ISP1130 |
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Philips Semiconductors
ISP1130
USB compound hub with keyboard controller
Objective specification
Rev. 01 — 23 March 2000
30 of 68
9397 750 06895
Philips Electronics N.V. 2000. All rights reserved.
[1]
A ConditionalStall does not work if the PacketOverwritten status bit is set.
9.3 General commands
9.3.1
Read Device Status
Returns the Device Status register contents, see
Table 36
and
Table 37
. When the
SuspendChange, ConnectChange or BusReset bit is logic 1, the corresponding bit in
the Interrupt register is set and a microcontroller interrupt is generated.
Code (Hex) —
FE
Transaction —
read 1 byte.
9.3.2
Set Device Status
Changes the Device Status register. The contents of read-only bits are ignored.
Code (Hex) —
FE
Transaction —
write 1 byte.
Table 35: Set Endpoint Status command: bit description
Bit
Symbol
7
ConditionalStall
Description
A logic 1 stalls both endpoints of a Control endpoint (Endpoint identifier = 0),
unless the Setup Packet bit is set. In that case the entire command is ignored.
A logic 1 switches an interrupt endpoint to ‘rate feedback mode’, a logic 0 enables
‘toggle’ mode.
A logic 1 disables the selected endpoint, a logic 0 enables it again. A bus reset
(re-)enables all endpoints.
reserved
A logic 1 stalls the selected endpoint. A logic 0 unstalls the endpoint and
(re-)initializes it, whether it was stalled or not.
6
RateFeedbackMode
5
Disable
4 to 1
0
-
Stalled
Table 36: Device Status register: bit allocation
Bit
7
Symbol
-
6
-
5
-
4
3
2
1
0
Bus
Reset
X
R
Suspend
Change
X
R
Suspend
Connect
Change
X
R
Connect
Reset
Access
X
W
X
W
X
W
X
0
R/W
R/W
Table 37: Device Status register: bit description
Bit
Symbol
7 to 5
-
4
BusReset
Description
reserved
A logic 1 signals that the device received a bus reset. Upon a bus reset the device
will automatically enter its default state (unconfigured and responding to
address 0). This bit is cleared when it is read.
A logic 1 signals that the value of the Suspend bit has changed. The Suspend bit
changes when the device enters ‘suspend’ mode or when it receives a ‘resume’
signal on its upstream port. This bit is cleared when it is read.
3
SuspendChange
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1130DL | Universal Serial Bus compound hub with integrated keyboard controller |
| ISP1130N | Universal Serial Bus compound hub with integrated keyboard controller |
| ISP1160 | Embedded Universal Serial Bus Host Controller |
| ISP1160BD | Embedded Universal Serial Bus Host Controller |
| ISP1160BM | Embedded Universal Serial Bus Host Controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1130DL | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus compound hub with integrated keyboard controller |
| ISP1130N | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Universal Serial Bus compound hub with integrated keyboard controller |
| ISP1160 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD,157 | 功能描述:USB 接口集成電路 USB 1.1 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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