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參數資料
| 型號： | ISP1160 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Embedded Universal Serial Bus Host Controller |
| 中文描述： | 嵌入式通用串行總線主控制器 |
| 文件頁數： | 15/88頁 |
| 文件大小： | 2044K |
| 代理商： | ISP1160 |
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Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 04 — 04 July 2003
15 of 88
9397 750 11371
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
There are two groups of interrupts represented by group 1 and group 2 in
Figure 13
.
A pair of registers control each group.
Group 2 contains six possible interrupt events (recorded in the HcInterruptStatus
register). On occurrence of any of these events, the corresponding bit would be set to
logic 1; and if the corresponding bit in the HcInterruptEnable register is also logic 1,
the 6-input OR gate would output a logic 1. This output is AND-ed with the value of
MIE (bit 31 of HcInterruptEnable). Logic 1 at the AND gate will cause the OPR bit in
the Hc
μ
PInterrupt register to be set to logic 1.
Group 1 contains six possible interrupt events, one of which is the output of group 2
interrupt sources. The Hc
μ
PInterrupt and Hc
μ
PInterruptEnable registers work in the
same way as the HcInterruptStatus and HcInterruptEnable registers in the interrupt
group 2. The output from the 6-input OR gate is connected to a latch, which is
controlled by InterruptPinEnable (bit 0 of the HcHardwareConfiguration register).
In the event in which the software wishes to temporarily disable the interrupt output of
the ISP1160 Host Controller, the following procedure should be followed:
1. Make sure that the InterruptPinEnable bit in the HcHardwareConfiguration
register is set to logic 1.
2. Clear all bits in the Hc
μ
PInterrupt register.
3. Set the InterruptPinEnable bit to logic 0.
Fig 13. HC interrupt logic.
004aaa102
S
A
A
O
H
HcμPInterrupt
register
HcInterruptEnable
register
HcInterruptStatus
register
C
RHSC
FNO
UE
RD
SF
SO
RHSC
FNO
UE
RD
SF
SO
MIE
OR
S
A
A
O
H
HcμPInterruptEnable
register
C
OR
LATCH
INT
group 2
InterruptPinEnable
HcHardwareConfiguration
register
g
LE
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1160BD | Embedded Universal Serial Bus Host Controller |
| ISP1160BM | Embedded Universal Serial Bus Host Controller |
| ISP1161A | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1161ABD | Full-speed Universal Serial Bus single-chip host and device controller |
| ISP1161ABM | Full-speed Universal Serial Bus single-chip host and device controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1160BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD,157 | 功能描述:USB 接口集成電路 USB 1.1 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller |
| ISP1160BD/01,118 | 功能描述:USB 接口集成電路 USB HOST CTRL RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1160BD/01,151 | 功能描述:USB 接口集成電路 USB FULL SPEED HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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