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參數資料
型號: ISP1160
廠商: NXP Semiconductors N.V.
英文描述: Embedded Universal Serial Bus Host Controller
中文描述: 嵌入式通用串行總線主控制器
文件頁數: 24/88頁
文件大小: 2044K
代理商: ISP1160
Philips Semiconductors
ISP1160
Embedded USB Host Controller
Product data
Rev. 04 — 04 July 2003
24 of 88
9397 750 11371
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
The data transfer can be done via the PIO mode or the DMA mode. The data transfer
rate can go up to 15 Mbyte/s. In the DMA operation, the single-cycle or multi-cycle
burst modes are supported. Multi-cycle burst modes of 1, 4 or 8 cycles per burst are
supported for the ISP1160.
9.4.2
Data organization
PTD data is used for every data transfer between a microprocessor and the USB bus,
and the PTD data resides in the buffer RAM. For an OUT or SETUP transfer, the
payload data is placed just after the PTD, after which the next PTD is placed. For an
IN transfer, RAM space is reserved for receiving a number of bytes that is equal to the
total bytes of the transfer. After this, the next PTD and its payload data are placed
(see
Figure 18
).
Remark:
The PTD is defined for both the ATL and ITL type data transfer. For ITL, the
PTD data is put into ITL buffer RAM, and the ISP1160 takes care of the Ping-Pong
action for the ITL buffer RAM access.
The PTD data (PTD header and its payload data) is a structure of DWORD alignment.
This means that the memory address is organized in blocks of 4 bytes. Therefore, the
first byte of every PTD and the first byte of every payload data are located at an
address that is a multiple of 4.
Figure 19
illustrates an example in which the first
payload data is 14 bytes long, meaning that the last byte of the payload data is at the
location 15H. The next addresses (16H and 17H) are not multiples of 4. Therefore,
the first byte of the next PTD will be located at the next multiple-of-four address (18H).
Fig 18. Buffer RAM data organization.
MGT952
PTD of OUT transfer
RAM buffer
payload data of OUT transfer
PTD of IN transfer
empty space for IN total data
PTD of OUT transfer
payload data of OUT transfer
top
bottom
000H
7FFH
相關PDF資料
PDF描述
ISP1160BD Embedded Universal Serial Bus Host Controller
ISP1160BM Embedded Universal Serial Bus Host Controller
ISP1161A Full-speed Universal Serial Bus single-chip host and device controller
ISP1161ABD Full-speed Universal Serial Bus single-chip host and device controller
ISP1161ABM Full-speed Universal Serial Bus single-chip host and device controller
相關代理商/技術參數
參數描述
ISP1160BD 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller
ISP1160BD,157 功能描述:USB 接口集成電路 USB 1.1 HOST CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1160BD/01 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Embedded Universal Serial Bus Host Controller
ISP1160BD/01,118 功能描述:USB 接口集成電路 USB HOST CTRL RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1160BD/01,151 功能描述:USB 接口集成電路 USB FULL SPEED HOST RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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