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參數資料
| 型號： | ISP1181DGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | INDUCTOR 4.7NH +-.3NH 0402 SMD |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, TSSOP-48 |
| 文件頁數： | 13/69頁 |
| 文件大小： | 1655K |
| 代理商： | ISP1181DGG |
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Philips Semiconductors
ISP1181
Full-speed USB interface
Objective specification
Rev. 01 — 13 March 2000
13 of 69
9397 750 06896
Philips Electronics N.V. 2000. All rights reserved.
This ensures that the last SETUP packet stays in the buffer and that no packets can
be sent back to the host until the microcontroller has explicitly acknowledged that it
has seen the SETUP packet.
10. DMA transfer
Direct Memory Access (DMA) is a method to transfer data from one location to
another in a computer system, without intervention of the central processor (CPU).
Many different implementations of DMA exist. The ISP1181 supports two methods:
8237 compatible mode
: based on the DMA subsystem of the IBM personal
computers (PC, AT and all its successors and clones); this architecture uses the
Intel 8237 DMA controller and has separate address spaces for memory and I/O
DACK-only mode
: based on the DMA implementation in some embedded RISC
processors, which has a single address space for both memory and I/O.
The ISP1181 supports DMA transfer for all 14 configurable endpoints (see
Table 4
).
Only one endpoint at a time can be selected for DMA transfer. The DMA operation of
the ISP1181 can be interleaved with normal I/O mode access to other endpoints.
The following features are supported:
Single-cycle or burst transfers (up tot 16 bytes per cycle)
Programmable transfer direction (read or write)
Multiple End-Of-Transfer (EOT) sources: external pin, internal conditions,
short/empty packet
Programmable signal levels on pins DREQ, DACK and EOT
Automatic DMA counter reload and transfer restart following EOT.
10.1 Selecting an endpoint for DMA transfer
The target endpoint for DMA access is selected via bits EPDIX[3:0] in the DMA
Configuration Register, as shown in
Table 7
. The transfer direction (read or write) is
automatically set by bit EPDIR in the associated ECR, to match the selected endpoint
type (OUT endpoint: read; IN endpoint: write).
Asserting input DACK automatically selects the endpoint specified in the DMA
Configuration Register, regardless of the current endpoint used for I/O mode access.
Table 7:
Endpoint selection for DMA transfer
Endpoint
identifier
EPIDX[3:0]
Transfer direction
EPDIR = 0
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
OUT: read
EPDIR = 1
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
IN: write
1
2
3
4
5
6
7
0010
0011
0100
0101
0110
0111
1000
相關PDF資料 |
PDF描述 |
|---|---|
| ISP1183 | Low-power Universal Serial Bus interface device with DMA |
| ISP1183BS | Low-power Universal Serial Bus interface device with DMA |
| ISP1301 | Universal Serial Bus On-The-Go transceiver |
| ISP1301BS | Universal Serial Bus On-The-Go transceiver |
| ISP1362 | Single-chip Universal Serial Bus On-The-Go controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1183 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-power Universal Serial Bus interface device with DMA |
| ISP1183BS | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS,118 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,151 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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