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參數(shù)資料
| 型號： | ISP1760 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Hi-Speed Universal Serial Bus host controller for embedded applications |
| 中文描述： | 高速嵌入式應(yīng)用的通用串行總線主控制器 |
| 文件頁數(shù)： | 13/105頁 |
| 文件大小： | 449K |
| 代理商： | ISP1760 |
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9397 750 13257
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet
Rev. 01 — 8 November 2004
13 of 105
Philips Semiconductors
ISP1760
Embedded Hi-Speed USB host controller
7.2 Host Controller buffer memory block
7.2.1
General considerations
The internal addressable Host Controller buffer memory is 63 kbytes. The 63-kbyte
effective memory size is the result of subtracting the size of registers (1 kbyte) from the
total addressable memory space defined in the ISP1760 (64 kbytes). This is the optimized
value for achieving the highest performance with a minimal cost.
The ISP1760 is a slave Host Controller. This means that it does not need access to the
local bus of the system to transfer data from the memory of the system to the ISP1760
internal memory, unlike the case of the original PCI Hi-Speed USB Host Controllers.
Therefore, correct data must be transferred to both the Philips Transfer Descriptor (PTD)
area and the payload area by Parallel I/O (PIO) (CPU access) or programmed DMA.
The ‘slave-host’ architecture ensures better compatibility with most of the processors
present in the market today because not all processors allow a ‘bus-master’ on the local
bus. It also allows better load balancing of the processor’s local bus because only the
internal bus arbiter of the processor controls the transfer of data dedicated to USB. This
prevents the local bus from being busy when other more important transfers may be in the
queue; and therefore achieving a ‘linear’ system data flow that has less impact on other
processes running at the same time.
The considerations mentioned are also the main reason for implementing the prefetching
technique, instead of using a READY signal. The resulting architecture avoids ‘freezing’ of
the local bus (by asserting READY), enhancing the ISP1760 memory access time, and
avoiding introduction of programmed additional wait states. For details, see
Section 7.3
and
Section 8.3.8
.
Fig 3.
Internal hub.
004aaa513
EHCI
ROOT HUB
INTERNAL HUB (TT)
EXTERNAL
PORTS
ENUMERATION
AND POLLING USING
ACTUAL PTDs
PORTSC1
PORT3
PORT1
PORT2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ISP1761 | Hi-Speed Universal Serial Bus On-The-Go controller |
| ISP1761BE | Hi-Speed Universal Serial Bus On-The-Go controller |
| ISP1761ET | Hi-Speed Universal Serial Bus On-The-Go controller |
| ISP2100A | Telecommunication IC |
| ISP2100BN4 | Microprocessor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ISP1760BE | 制造商:NXP Semiconductors 功能描述:CONTROLLER USB HOST SMD LQFP128 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB HOST 128LQFP |
| ISP1760BE,518 | 功能描述:輸入/輸出控制器接口集成電路 USB HOST CONTROLLER RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| ISP1760BE,551 | 功能描述:輸入/輸出控制器接口集成電路 USB HS HOST CONTRLLR RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| ISP1760BE,557 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1760BE518 | 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB HOST 128LQFP |
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