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參數資料
| 型號： | L64733C-44 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC44 |
| 封裝： | 7 X 7 MM, 0.90 MM HEIGHT, QFN-44 |
| 文件頁數： | 11/52頁 |
| 文件大小： | 552K |
| 代理商： | L64733C-44 |
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L64733C/L64734 Tuner and Satellite Receiver Chipset
19
BCLKOUT
Byte Clock Out
Output
The BCLKOUT output signal is a strobe that indicates
valid data bytes on the CO[7:0] bus when the L64734 is
in Parallel Channel Output mode. The BCLKOUT signal
cycles once every valid output data byte and is used by
the transport demultiplexer to latch output data from the
L64734 at the BCLKOUT rate. The BCLKOUT signal
must be disregarded in Serial Channel Output mode.
CO[7:0]
Channel Data Out
Output
The CO[7:0] signals form the decoded output data port.
When the OF bit is 1 (Group 4, APR17), the L64734
operates in the Parallel Channel Output mode. In this
mode, the L64734 outputs the channel data as 8-bit wide
parallel data on the CO[7:0] signals. In Serial Channel
Output mode (OF = 0), the L64734 outputs the channel
data as serial data on CO[0]. The data is latched on each
bit clock cycle. The chronological ordering in Serial
Channel output mode is MSB oldest, LSB newest.
COEn
Channel Output Enable
Input
When asserted, the COEn signal enables the
ERROROUTn, CO[7:0], DVALIDOUT, BCLKOUT, and
FSTARTOUT signals. Operation of the receiver continues
regardless of the state of the COEn signal.
DVALIDOUT
Valid Data Out
Output
The DVALIDOUT signal indicates that the CO[7:0] signals
contain the corrected channel data. New data is valid on
the CO[7:0] signals when the DVALIDOUT signal is
asserted. DVALIDOUT is not asserted during the
propagated check and GAP bytes. The DVALIDOUT
signal is deasserted after the FEC_RST register bit
(Group 4, APR 55) is set to one.
ERROROUTn Error Detection Flag
Output
The L64734 asserts the ERROROUTn signal at the
beginning of each frame that contains an uncorrectable
error, and deasserts it at the end of the frame if the error
condition is removed. The ERROROUTn signal is aligned
with the output data stream and is asserted after the
FEC_RST register bit is set.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| L64734 | 制造商:LSI 制造商全稱:LSI 功能描述:Tuner and Satellite Receiver Chipset |
| L64734C-45 | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| L64735GM-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-27 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
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