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參數資料
| 型號： | L64733C-44 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC44 |
| 封裝： | 7 X 7 MM, 0.90 MM HEIGHT, QFN-44 |
| 文件頁數： | 5/52頁 |
| 文件大小： | 552K |
| 代理商： | L64733C-44 |
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L64733C/L64734 Tuner and Satellite Receiver Chipset
13
LOBUF is deasserted, the internal PLL mode is in effect,
and the PSOUT pins are driven from the 32/33 prescaler.
LODIV
Local Oscillator Buffer Division Ratio
Input
When the LODIV signal is asserted, the local oscillator
(LO) buffer division ratio is set to 1; when it is deasserted,
the ratio is set to 2.
MODp, MODn Prescaler Modulus
Input
The MOD differential signals form a Positive Emitter
Coupled Logic (PECL) input that sets the prescaler
modulus. When the MODp signal is positive with respect
to the MODn signal, the prescaler modulus is set to 32
(divide by 32). When the MODn signal is positive with
respect to the MODp signal, the prescaler modulus is set
to 33 (divide by 33).
PLLINp, PLLINn
Phase Detector
Input
The PLLIN differential signals form the phase detector
input and are connected to the L64734 PLLINp and
PLLINn output signals. See the L64734 PLLINp and
PLLINn descriptions in the “Synthesizer Control Interface”
section.
QDCp, QDCn Q-Channel DC Offset Correction
Input
Connect a 0.1
F or larger capacitor between the QDCp
and QDCn signals.
Charge Pump Signals
The following signals are outputs from the L64733C charge pump.
CP
Charge Pump
Output
FB
Feedback
Charge Pump Transistor Drive
Output
L64734 Signal Descriptions
This section describes the L64734 signals. Figure 6 shows the interface
diagram of the L64734.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| L64734 | 制造商:LSI 制造商全稱:LSI 功能描述:Tuner and Satellite Receiver Chipset |
| L64734C-45 | 制造商:LSI 功能描述: 制造商:LSI Corporation 功能描述: |
| L64735GM-20 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-27 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
| L64735GM-35 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Image Processor |
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