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參數(shù)資料
| 型號： | LC749870LG |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA64 |
| 封裝： | 5 X 5 MM, FLGA-64 |
| 文件頁數(shù)： | 26/44頁 |
| 文件大?。?/td> | 538K |
| 代理商： | LC749870LG |
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LC749870LG
No.A1765-32/44
6. Digital Clamp
The digital clamp circuit detects the pedestal level of the input video signal, and keeps the level constant. Because the
digital clamp includes a time constant circuit, following rapid changes in the input video signal can be suppressed.
Fig.3 Waveform Change Before and After Digital Clamp
7. Sync Separator
The sync separator circuit separates horizontal and vertical sync signals out of the input video signals. Because an LPF
is built in, the sync signal can be separated even in a weak electric field. The weak electric field is detected using the
S/N detection result. Moreover, the stability of the sync signal in the weak electric field is improved by the internal
AFC circuit. Fig. 4 shows the LPF characteristics for the sync separator. “FILSEL = 1’b0” is the characteristic of an
LPF for a weak electric field, and “FILSEL = 1’b1” is the characteristic of an LPF for a strong electric field.
Fig.4 LPF Characteristics for Sync Separator
8. Timing Generator
Using the sync signal separated by the sync separator circuit, the timing generator generates various timing signals to
be used for each module as well as for horizontal and vertical blanking signals. The adjustments of timing signals are
possible by setting the corresponding register (s) as follows:
Positioning of horizontal sync signal: I2A_HSPAD
Positioning of vertical sync signal: I2A_VSTART
Positioning of horizontal blanking signal: I2A_HBSTART, I2A_HBEND
Positioning and width adjustment of vertical blanking signal: I2A_VBSTART, I2A_VBWIDTH
0LSB
Target pedestal level
Input signal
Before clamp
After clamp
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