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參數(shù)資料
| 型號(hào)： | LC75384NE-R |
| 元件分類： | 音頻控制 |
| 英文描述： | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PQFP64 |
| 封裝： | QIP-64 |
| 文件頁(yè)數(shù)： | 13/25頁(yè) |
| 文件大小： | 213K |
| 代理商： | LC75384NE-R |
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Zero Cross Switching Circuit Operating Principles
The LC75384NE-R/NW include functions for switching the place where the zero cross comparator operates and thus
allows applications to select the optimal detection location for the block for which the control data is updated.
Basically, switching noise will be minimized if the signal immediately following the block for which the control data is
updated is input to the zero cross comparator. Thus the detection location must be changed for each data update
operation. Another issue is the point that if the signal amplitude is lower than the detection sensitivity (a few mV rms)
of the zero cross comparator (for example if the volume is set to a low level), the switching noise can be minimized
further by selecting a point before the volume control block, namely the selector block output, as the zero cross
detection point than by simply waiting for the data write to occur due to the overflow of the zero cross timer. For
example, if the volume block input is 1 V rms, and the volume is set to –40 dB or lower, the output will be under
10 mV rms. In this case, detecting at the selector output block will result in lower switching noise.
No.6169-20/25
LC75384NE-R, 75384NW
Zero Cross Switching Control Procedure
The zero cross switching control procedure consists of first setting the zero cross detection mode with the zero cross
control bits (D36 and D37 = 0) and then, after specifying the detection block (with bits D38, D39, D40, and D41),
sending the control data. Since these control bits are latched first immediately after the data is sent, i.e. on the falling
edge of the CE signal, it is possible to both set the IC mode as well as specify zero cross switching operation in a single
data transfer, even when updating the volume and other data. The following presents an example of the control
operation when updating the volume block data.
D36
Zero cross detection
mode specification
Volume block setting
D37
D38
D39
D40
D41
001000
Zero Cross Timer Setting
When the input signal has a level lower than the detecting sensitivity of the zero cross comparator, or consists only of
extremely low frequencies, the zero cross detection circuit will remain in the state in which it cannot detect a zero cross
and the data will not be latched during that period. The zero cross timer specifies a time after which the data will be
latched forcibly in states where a zero crossing cannot be detected. The time is determined by the lowest frequency for
which a zero cross can be detected reliably.
For example, if the timer is set to 25 ms:
T = 0.69 CR
If C is taken to be 0.033 F, then R will be:
R =
25
× 10-3
≈ 1.1 M
0.69
× 0.033 × 10-6
Selector
Volume
Tone
Fader
Switch
Zero cross
comparator
Zero Cross Detection Circuit
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| LC75384NW | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PQFP64 |
| LC75386NE-R | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PQFP64 |
| LC75386NW | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PQFP64 |
| LC75386NE | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PQFP64 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC75385NE-R | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| LC75386NE | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Electronic Volume and Tone Control for Car Stereo Systems |
| LC75386NE-L | 制造商:SANYO Semiconductor Co Ltd 功能描述:2 CHANNEL(S), TONE CONTROL CIRCUIT, PQFP64 |
| LC75386NE-R | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:LC75386NE-R/LC75386NW |
| LC75386NE-R-E | 制造商:ON Semiconductor 功能描述: |
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