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參數資料
| 型號： | LC89058W-E |
| 廠商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, SQFP-48 |
| 文件頁數： | 37/46頁 |
| 文件大小： | 284K |
| 代理商： | LC89058W-E |
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LC89058W-E
No.A1056-42/64
12.2.2 Details of write commands
CCB address: 0xE8; Command address: 0; System setting 1
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
TESTM
0
DOEN
SYSRST
System reset
0: Don't reset (initial value)
1: Reset circuits other than command registers
DOEN
DO pin output setting
0: Output (initial value)
1: Always high impedance state (read disabled)
TESTM
Test mode setting
0: Normal operation (initial value)
1: Enter test mode
When reset by SYSRST is performed, RBCK outputs “L” and BLRCK outputs “H.”
CCB address: 0xE8; Command address: 1; System setting 2
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
0
1
0
CAU
CAL
DI15
DI14
DI13
DI12
DI11
DI10
DI9
DI8
0
FSLIM1
FSLIM0
RXMON
AOSEL
0
MOSEL
MOUT output contents setting
0: Output channel status emphasis information (initial value)
1: Output input data fs calculation results (output conditions are given by FSSEL[1:0].)
AOSEL
AUDIO
output mode
0: Only output channel status bit 1 (initial value)
1: Output channel status bit 1, IEC61937 or DTS-CD/LD detection flag
RXMON
Setting digital audio data (S/PDIF) input status monitoring
0: Don’t monitor S/PDIF input status (initial value).
1: Monitor S/PDIF input status
FSLIM[1:0]
Setting of sampling frequency reception range for input digital signal
00: No limit (initial value)
01: fs
≤96kHz (when exceeded, data is muted and clock is set to XIN system output)
10: fs
≤48kHz (when exceeded, data is muted and clock is set to XIN system output)
11: Reserved
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