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參數(shù)資料
| 型號(hào)： | LMF100 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | High Performance Dual Switched Capacitor Filter |
| 中文描述： | 高性能雙開關(guān)電容濾波器 |
| 文件頁數(shù)： | 20/28頁 |
| 文件大小： | 868K |
| 代理商： | LMF100 |
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2.0 Modes of Operation
(Continued)
TABLE 1. Summary of Modes. Realizable filter types (e.g. low-pass) denoted by asterisks.
Unless otherwise noted, gains of various filter outputs are inverting and adjustable by resistor ratios.
Mode
BP
LP
HP
N
AP
Number of
Resistors
3
Adjustable
f
CLK
/f
0
No
Notes
1
*
*
*
(2)
May need input buffer.
Poor dynamics
for high Q.
Useful for high
frequency applications.
1a
H
OBP1
= Q
H
OBP2
= + 1
*
H
OLP
= + 1
2
No
1b
*
*
3
No
Yes (above
f
CLK
/50 or
f
CLK
/100)
2
*
*
*
3
Universal State-
Variable Filter. Best
general-purpose mode.
As above, but also
includes resistor-
tuneable notch.
Gives Allpass res-
ponse with H
OAP
= 1
and H
OLP
= 2.
Gives flatter allpass
response than above
if R
1
= R
2
= 0.02R
4
.
Single pole.
3
*
*
*
4
Yes
3a
*
*
*
*
7
Yes
4
*
*
*
3
No
5
*
*
*
4
Yes
6a
*
*
3
Yes
(2)
6b
H
OLP1
= + 1
2
Yes
Single pole.
6c
7
*
*
3
2
No
Yes
Single pole.
Summing integrator with
adjustable time constant.
3.0 Applications Information
The LMF100 is a general purpose dual second-order state
variable filter whose center frequency is proportional to the
frequency of the square wave applied to the clock input
(f
). The various clocking options are summarized in the
following table.
Clocking Options
Power Supply
5V and +5V
5V and +5V
0V and 10V
0V and 10V
2.5V and
+2.5V
Clock Levels
TTL (0V to +5V)
CMOS (5V to +5V)
TTL (0V to 5V)
CMOS (0V to +10V)
CMOS
LSh
0V
0V
0V
+5V
V
D+
+5V
+5V
+10V
+10V
0V
+2.5V
(2.5V to +2.5V)
TTL (0V to +5V)
0V and 5V
0V
0V
Power Supply
0V and 5V
By connecting pin 12 to the appropriate dc voltage, the filter
center frequency, f
, can be made equal to either f
/100 or
f
/50. f
can be very accurately set (within
±
0.6%) by us-
ing a crystal clock oscillator, or can be easily varied over a
wide frequency range by adjusting the clock frequency. If de-
sired, the f
/f
ratio can be altered by external resistors as
in Figures 10, 11, 12, 13, 14, 15and Figure 16 This is useful
when high-order filters (greater than two) are to be realized
by cascading the second-order sections. This allows each
stage to be stagger tuned while using only one clock. The fil-
ter Q and gain are set by external resistor ratios.
All of the five second-order filter types can be built using ei-
ther section of the LMF100. These are illustrated in Figures
1, 2, 3, 4 and Figure 5 along with their transfer functions and
some related equations. Figure 6 shows the effect of Q on
the shapes of these curves.
Clock Levels
CMOS (0V to +5V)
LSh
+2.5V
V
D+
+5V
www.national.com
20
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| LMF100CCN/NOPB | 功能描述:IC FILTER DUAL SWITCH CAP 20-DIP RoHS:是 類別:集成電路 (IC) >> 接口 - 濾波器 - 有源 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1,000 系列:- 濾波器類型:連續(xù)時(shí)間，帶通低通 頻率 - 截止或中心:150kHz 濾波器數(shù):4 濾波器階數(shù):8th 電源電壓:4.74 V ~ 11 V，±2.37 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) |
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