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參數(shù)資料
| 型號： | LMF100 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | High Performance Dual Switched Capacitor Filter |
| 中文描述： | 高性能雙開關電容濾波器 |
| 文件頁數(shù)： | 4/28頁 |
| 文件大小： | 868K |
| 代理商： | LMF100 |
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Logic Input Characteristics
Boldface limits apply for T
MIN
to T
MAX
;
all other limits T
A
= T
J
= 25C.
Parameter
Conditions
LMF100CCN
Tested
Limit
(Note 9)
+3.0
3.0
+8.0
+2.0
+2.0
+0.8
+2.0
+0.8
+1.5
1.5
+4.0
+1.0
+2.0
+0.8
LMF100CIWM
Tested
Limit
(Note 9)
+3.0
3.0
+8.0
+2.0
+2.0
+0.8
+2.0
+0.8
+1.5
1.5
+4.0
+1.0
+2.0
+0.8
Units
Typical
(Note 8)
Design
Limit
(Note 10)
+3.0
3.0
+8.0
+2.0
+2.0
+0.8
+2.0
+0.8
+1.5
1.5
+4.0
+1.0
+2.0
+0.8
Typical
(Note 8)
Design
Limit
(Note 10)
CMOS Clock
Input Voltage
MIN Logical “1”
MAX Logical “0”
MIN Logical “1”
MAX Logical “0”
MIN Logical “1”
MAX Logical “0”
MIN Logical “1”
MAX Logical “0”
MIN Logical “1”
MAX Logical “0”
MIN Logical “1”
MAX Logical “0”
MIN Logical “1”
MAX Logical “0”
V
+
= +5V, V
= 5V,
V
LSh
= 0V
V
+
= +10V, V
= 0V,
V
LSh
= +5V
V
+
= +5V, V
= 5V,
V
LSh
= 0V
V
+
= +10V, V
= 0V,
V
LSh
= 0V
V
+
= +2.5V, V
= 2.5V,
V
LSh
= 0V
V
+
= +5V, V
= 0V,
V
LSh
= +2.5V
V
+
= +5V, V
= 0V,
V
LSh
= 0V, V
D+
= 0V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
TTL Clock
Input Voltage
CMOS Clock
Input Voltage
TTL Clock
Input Voltage
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is in-
tended to be functional. These ratings do not guarantee specific performance limits, however. For guaranteed specifications and test conditions, see the Electrical
Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not op-
erated under the listed test conditions.
Note 2:
When the input voltage (V
) at any pin exceeds the power supply rails (V
<
V
or V
>
V
+
) the absolute value of current at that pin should be limited
to 5 mA or less. The sum of the currents at all pins that are driven beyond the power supply voltages should not exceed 20 mA.
Note 3:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
,
θ
, and the ambient temperature, T
. The maximum
allowable power dissipation at any temperature is P
= (T
T
)/
θ
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
T
= 125C, and the typical junction-to-ambient thermal resistance of the LMF100CIN when board mounted is 55C/W. For the LMF100CIWM this number is
66C/W.
Note 4:
The accuracy of the Q value is a function of the center frequency (f
0
). This is illustrated in the curves under the heading “Typical Peformance Characteristics”.
Note 5:
V
os1
, V
os2
, and V
os3
refer to the internal offsets as discussed in the Applications Information section 3.4.
Note 6:
Crosstalk between the internal filter sections is measured by applying a 1 V
10 kHz signal to one bandpass filter section input and grounding the input
of the other bandpass filter section. The crosstalk is the ratio between the output of the grounded filter section and the 1 V
RMS
input signal of the other section.
Note 7:
The short circuit source current is measured by forcing the output that is being tested to its maximum positive voltage swing and then shorting that output
to the negative supply. The short circuit sink current is measured by forcing the output that is being tested to its maximum negative voltage swing and then shorting
that output to the positive supply. These are the worst case conditions.
Note 8:
Typicals are at 25C and represent most likely parametric norm.
Note 9:
Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 10:
Design limits are guaranteed to National’s AOQL (Average Outgoing Quality Level) but are not 100% tested.
Note 11:
Human body model, 100 pF discharged through a 1.5 k
resistor.
Note 12:
In 50:1 mode the output noise is 3 dB higher.
Note 13:
In 50:1 mode the clock feedthrough is 6 dB higher.
Note 14:
A military RETS specification is available upon request.
www.national.com
4
相關PDF資料 |
PDF描述 |
|---|---|
| LMF100CCN | High Performance Dual Switched Capacitor Filter |
| LMF100CIWM | High Performance Dual Switched Capacitor Filter |
| LMF100ACN | IC-MONOLITHIC FILTER |
| LMF380 | LMF380 Triple One-Third Octave Switched-Capacitor Active Filter |
| LMF380C1J | LMF380 Triple One-Third Octave Switched-Capacitor Active Filter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LMF100ACN | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:IC-MONOLITHIC FILTER |
| LMF100AJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog Filter |
| LMF100CCN | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述:FILTER DUAL SWITCHED CAP DIP 100 |
| LMF100CCN | 制造商:Texas Instruments 功能描述:FILTER DUAL SWITCHED CAP DIP 100 |
| LMF100CCN/NOPB | 功能描述:IC FILTER DUAL SWITCH CAP 20-DIP RoHS:是 類別:集成電路 (IC) >> 接口 - 濾波器 - 有源 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1,000 系列:- 濾波器類型:連續(xù)時間，帶通低通 頻率 - 截止或中心:150kHz 濾波器數(shù):4 濾波器階數(shù):8th 電源電壓:4.74 V ~ 11 V，±2.37 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:28-SOIC W 包裝:帶卷 (TR) |
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