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參數資料
型號: LMX2301TMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinumTM 160 MHz Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 160 MHz, PDSO20
封裝: 0.173 INCH, PLASTIC, TSSOP-20
文件頁數: 12/14頁
文件大?。?/td> 225K
代理商: LMX2301TMX
Application Information
(Continued)
Therefore, if we specify the loop bandwidth,
0
p
, and the
phase margin,
w
p
, Equations 1 through 6 allow us to calcu-
late the two time constants, T1 and T2, as shown in equa-
tions 7 and 8. A common rule of thumb is to begin your
design with a 45
§
phase margin.
T1
e
sec
w
p
b
tan
w
p
0
p
(7)
T2
e
0
p2
#
N
0
1
0
p2
#
T1
(8)
From the time constants T1, and T2, and the loop band-
width,
0
p
, the values for C1, R2, and C2 are obtained in
equations 9 to 11.
T2
#
K
w
#
K
VCO
C1
e
T1
1
a
(
0
p
#
T2)
2
1
a
(
0
p
#
T1)
2
(9)
C2
e
C1
#
#
T2
T1
b
1
J
(10)
R2
e
T2
C2
(11)
K
VCO
(MHz/V)
Voltage Controlled Oscillator (VCO)
Tuning Voltage constant. The fre-
quency vs voltage tuning ratio.
K
w
(mA)
Phase detector/charge pump gain
constant. The ratio of the current out-
put to the input phase differential.
N
Main divider ratio. Equal to RF
opt
/f
ref
Radio Frequency output of the VCO at
which the loop filter is optimized.
RF
opt
(MHz)
f
ref
(kHz)
Frequency of the phase detector in-
puts. Usually equivalent to the RF
channel spacing.
[
(T1
a
T3)
2
a
T1
#
T3
]
#
D
0
1
a
(T1
a
T3)
2
a
T1
#
T3
In choosing the loop filter components a trade off must be
made between lock time, noise, stability, and reference
spurs. The greater the loop bandwidth the faster the lock
time will be, but a large loop bandwidth could result in higher
reference spurs. Wider loop bandwidths generally improve
close in phase noise but may increase integrated phase
noise depending on the reference input, VCO and division
ratios used. The reference spurs can be reduced by reduc-
ing the loop bandwidth or by adding more low pass filter
stages but the lock time will increase and stability will de-
crease as a result.
THIRD ORDER FILTER
A low pass filter section may be needed for some applica-
tions that require additional rejection of the reference side-
bands, or spurs. This configuration is given in Figure 4. In
order to compensate for the added low pass section, the
component values are recalculated using the new open
loop unity gain frequency. The degradation of phase margin
caused by the added low pass is then mitigated by slightly
increasing C1 and C2 while slightly decreasing R2.
The added attenuation from the low pass filter is:
ATTEN
e
20 log
[
(2
q
f
ref
#
R3
#
C3)
2
a
1
]
Defining the additional time constant as
T3
e
R3
#
C3
Then in terms of the attenuation of the reference spurs add-
ed by the low pass pole we have
(12)
(13)
T3
e
10
ATTEN/20
b
1
(2
q
#
f
ref
)
2
(14)
We then use the calculated value for loop bandwidth
0
c
in
equation 11, to determine the loop filter component values
in equations 15–17.
0
c
is slightly less than
0
p
, therefore
the frequency jump lock time will increase.
T2
e
1
0
c2
#
(T1
a
T3)
(15)
0
c
e
tan
w
#
(T1
a
T3)
[
tan
w
#
(T1
a
T3)
]
2
b
1
(16)
C1
e
T1
T2
#
K
w
#
K
VCO
0
c2
#
N
#
D
(1
a
0
c2
#
T2
2
)
(1
a
0
c2
#
T1
2
) (1
a
0
c2
#
T3
2
)
(
(/2
(17)
http://www.national.com
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相關代理商/技術參數
參數描述
LMX2305 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinumTM 550 MHz Frequency Synthesizer for RF Personal Communications
LMX2305 WAF 制造商:Texas Instruments 功能描述:
LMX2305C WAF 制造商:Texas Instruments 功能描述:
LMX2305TM 制造商:Rochester Electronics LLC 功能描述:
LMX2305TMX 功能描述:IC FREQ SYNTH DUAL 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器,PLL,頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:*
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