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參數資料
| 型號： | LMX2430 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLLatinum雙高頻率合成射頻個人通信 |
| 文件頁數： | 3/49頁 |
| 文件大小： | 943K |
| 代理商： | LMX2430 |
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Connection Diagrams
Ultra Thin Chip Scale Package (SLE)
(Top View)
Thin Shrink Small Outline Package (TM)
(Top View)
20053539
20053583
Pin Descriptions
Pin No.
UTCSP
1
Pin No.
TSSOP
2
Pin Name
I/O
Description
GND
—
Ground for the IF PLL analog and digital circuits, MICROWIRE
TM
, Ftest/LD and
oscillator circuits.
IF PLL prescaler input. Small signal input from the VCO.
Chip Enable input. High Impedance CMOS input. When this pin is set HIGH,
the RF and IF PLLs are powered up. Powerdown is then controlled through the
MICROWIRE. When this pin is set LOW, the device is asynchronously powered
down and the charge pump output is forced to a high impedance state
(TRI-STATE).
IF PLL charge pump output. The output is connected to the external loop filter,
which drives the input of the IF VCO.
Oscillator Enable input. High impedance CMOS input. When this pin is set
HIGH, the oscillator buffer is always powered up, independent of the state of
the EN pin. When this pin is set LOW, the OSCout/ FLoutIF pin functions as an
IF Fastlock output, which connects a resistor in parallel to R2 of the external
loop filter.
Oscillator output/ IF PLL Fastlock output. The output configuration is dependent
on the state of the ENosc pin. When ENosc is set LOW, the pin functions as an
IF Fastlock output, which connects a resistor in parallel to R2 of the external
loop filter. This configuration also functions as a general purpose CMOS
TRI-STATE output. When ENosc is set HIGH, the pin functions as an oscillator
output so that an external crystal can be used.
Reference oscillator input. The input has an approximate Vcc/2 threshold and is
driven by an external AC coupled source.
Power supply bias for the RF PLL digital circuits and oscillator circuits. Vcc may
range from 2.25V to 2.75V. Bypass capacitors should be placed as close as
possible to this pin and be connected directly to the ground plane.
Programmable multiplexed output. Functions as a general purpose CMOS
TRI-STATE output, N and R divider output, RF/ IF PLL push-pull analog lock
detect output, RF/ IF PLL open-drain analog lock detect output, or RF/ IF PLL
digital filtered lock detect output.
2
3
3
4
FinIF
EN
I
I
4
5
CPoutIF
O
5
6
ENosc
I
6
7
OSCout/
FLoutIF
O
7
8
OSCin
I
8
9
Vcc
—
9
10
Ftest/LD
O
L
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相關PDF資料 |
PDF描述 |
|---|---|
| LMX2433TM | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2433TMX | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2434 | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2434TM | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2434TMX | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LMX2430EVAL | 功能描述:EVALUATION BOARD FOR LMX2430 RoHS:否 類別:編程器，開發系統 >> 評估演示板和套件 系列:PLLatinum™ 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| LMX2430EVAL/NOPB | 功能描述:時鐘和定時器開發工具 LMX2430 EVAL BOARD RoHS:否 制造商:Texas Instruments 產品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2430SLEX | 制造商:Texas Instruments 功能描述:3GHZ HI FREQ DUAL PLL SMD 2430 |
| LMX2430SLEX/NOPB | 功能描述:鎖相環 - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2430SLEXNOPB | 制造商:National Semiconductor 功能描述:PLL Frequency Synthesizer Dual 100MHz to 3000MHz 20-Pin LAM UCSP T/R |
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