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參數資料
| 型號： | LMX2430 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLLatinum雙高頻率合成射頻個人通信 |
| 文件頁數： | 38/49頁 |
| 文件大小： | 943K |
| 代理商： | LMX2430 |
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2.0 Programming Description
2.1 MICROWIRE INTERFACE
The 24-bit shift register is loaded via the MICROWIRE interface. The shift register consists of a 21-bit
DATA[20:0] FIELD
and a
3-bit
ADDRESS[2:0] FIELD
as shown below. TheADDRESS FIELD is used to decode the internal control register address. When
LE transitions HIGH, DATA stored in the shift register is loaded into one of 6 control registers depending on the state of the
ADDRESS bits. The MSB of DATA is loaded into the shift register first. The DATA FIELD assignments are shown in
Section 2.3
CONTROL REGISTER CONTENT MAP
.
MSB
LSB
DATA[20:0]
ADDRESS[2:0]
23
3 2
0
2.2 CONTROL REGISTER LOCATION
The ADDRESS[2:0] bits decode the internal register address. The table below shows how the ADDRESS bits are mapped into
the target control register.
ADDRESS[2:0]
FIELD
0
0
1
1
0
0
Target
Register
R0
R1
R2
R3
R4
R5
0
0
0
0
1
1
0
1
0
1
0
1
2.3 CONTROL REGISTER CONTENT MAP
The control register content map describes how the bits within each control register are allocated to specific control functions. The
bits that are marked 0 should be programmed as such to ensure proper device operation.
Reg
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA[20:0] FIELD
ADDRESS
[2:0]
FIELD
R0
MUX[3:2]
RF_
RST
RF_
CPT
RF_
CPG
RF_
CPP
RF_R[14:0]
0
0
0
R1
RF_
PD
RF_
P
LMX2430/33
RF_B[14:0]
LMX2430/33
RF_A[3:0]
0
0
1
R1
RF_
PD
RF_
P
LMX2434
RF_B[13:0]
LMX2434
RF_A[4:0]
0
0
1
R2
0
0
0
0
0
0
0
0
0
RF_TOC[11:0]
0
1
0
R3
MUX[1:0]
IF_
RST
IF_
CPT
IF_
CPG
IF_
CPP
IF_R[14:0]
0
1
1
R4
IF_
PD
IF_
P
0
IF_B[13:0]
IF_A[3:0]
1
0
0
R5
0
0
0
0
0
0
0
0
0
IF_TOC[11:0]
1
0
1
L
www.national.com
38
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PDF描述 |
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| LMX2433TM | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2433TMX | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2434 | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2434TM | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
| LMX2434TMX | PLLatinum Dual High Frequency Synthesizer for RF Personal Communications |
相關代理商/技術參數 |
參數描述 |
|---|---|
| LMX2430EVAL | 功能描述:EVALUATION BOARD FOR LMX2430 RoHS:否 類別:編程器，開發系統 >> 評估演示板和套件 系列:PLLatinum™ 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| LMX2430EVAL/NOPB | 功能描述:時鐘和定時器開發工具 LMX2430 EVAL BOARD RoHS:否 制造商:Texas Instruments 產品:Evaluation Modules 類型:Clock Conditioners 工具用于評估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| LMX2430SLEX | 制造商:Texas Instruments 功能描述:3GHZ HI FREQ DUAL PLL SMD 2430 |
| LMX2430SLEX/NOPB | 功能描述:鎖相環 - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2430SLEXNOPB | 制造商:National Semiconductor 功能描述:PLL Frequency Synthesizer Dual 100MHz to 3000MHz 20-Pin LAM UCSP T/R |
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