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參數(shù)資料
型號(hào)： LU3X54FTL
廠商： Lineage Power
英文描述： Quad-FET for 10Base-T/100Base-TX/FX(應(yīng)用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器)
中文描述： 四為10Base-T/100Base-TX/FX場(chǎng)效應(yīng)晶體管（應(yīng)用于10基數(shù)- T的和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器）
文件頁(yè)數(shù)： 1/52頁(yè)
文件大小： 669K
代理商： LU3X54FTL
Data Sheet
July 2000
LU3X54FTL
QUAD-FET for 10Base-T/100Base-TX/
FX
Introduction
Configuration
The LU3X54FTL is a four-channel, single-chip com-
plete transceiver designed specifically for dual-speed
10Base-T, 100Base-TX, and 100Base-FX repeaters
and switches. It supports simultaneous operation in
three separate IEEE standard modes: 10Base-T,
100Base-TX, and 100Base-FX. The LU3X54FTL
provides a 3.3 V or 5.0 V MII interface logic level.
Each channel implements:
I
10Base-T transceiver function of IEEE802.3.
I
Physical coding sublayer (PCS) of IEEE 802.3u.
I
Physical medium attachment (PMA) of IEEE
802.3u.
I
Autonegotiation of IEEE 802.3u.
I
MII management of IEEE802.3u.
I
Physical medium dependent (PMD) of IEEE802.3.
The LU3X54FTL supports operations over two pairs
of unshielded twisted-pair (UTP) cable (10Base-T
and 100Base-TX), and over fiber-optic cable
(100Base-FX).
It has been designed with a flexible system interface
that allows configuration for optimum performance
and effortless design. The individual per-port inter-
face can be configured as 100 Mbits/s MII, 10 Mbits/s
MII, 7-pin 10 Mbits/s serial, or bused mode.
Features
10 Mbits/s Transceiver
I
Compatible with IEEE* 802.3 10Base-T standard
for twisted-pair cable
I
Autopolarity detection and correction
I
Adjustable squelch level for extended line length
capability (two levels)
I
Interfaces with IEEE 802.3u media independent
interface (MII) or a serial 10 Mbits/s 7-pin interface
I
On-chip filtering eliminates the need for external
filters
I
Half- and full-duplex operations
100 Mbits/s TX Transceiver
I
Compatible with IEEE802.3u MII (clause 22), PCS
(clause 23), PMA (clause 24), autonegotiation
(clause 28), and PMD (clause 25) specifications
I
Scrambler/descrambler bypass
I
Encoder/decoder bypass
I
3-statable MII in 100 Mbits/s mode
I
Selectable carrier sense signal generation (CRS)
asserted during either transmission or reception in
half duplex (CRS asserted during reception only in
full duplex)
I
Selectable MII or 5-bit code group interface
I
Full- or half-duplex operations
I
Optional carrier integrity monitor (CIM)
I
On-chip filtering and adaptive equalization that
eliminates the need for external filters
100 Mbits/s FX Transceiver
I
Compatible with IEEE802.3U 100Base-FX stan-
dard
* IEEEis a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.
Note: Advisories are issued as needed to update product information. When using this data sheet for design purposes, please contact
your Lucent Technologies Microelectronics Group Account Manager to obtain the latest advisory on this product.
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