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參數資料
型號: MAX5963UTL+T
廠商: Maxim Integrated
文件頁數: 9/20頁
文件大小: 291K
描述: IC HOT SWAP DIO ORING CTL 40TQFN
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
類型: 熱交換控制器
應用: FireWire? 應用程序
內部開關:
電源電壓: 7.5 V ~ 76 V
工作溫度: 0°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應商設備封裝: 40-TQFN-EP(6x6)
包裝: 帶卷 (TR)
Dual, 7.5V to 76V, Hot-Swap and
Diode ORing Controller
_______________________________________________________________________________________   9
Pin Description
PIN
NAME
FUNCTION
1
PWR
System Power Input. Connect to the system power source. The MAX5963 draws less than 10礎 of
current from this input when GATEPS is off. Bypass PWR to GND with a 0.1礔 ceramic capacitor.
2, 4, 6, 10, 11,
14, 16, 21, 25,
30, 39, 40
N.C.
No Connection. Not internally connected.
3
GATEOR
ORing MOSFET Gate-Drive Output. Referenced to PWR. GATEOR is a charge pump with a 50礎
pullup current to 5.5V (typ) above V
PWR
 when active.
5
GATEPS
System Power MOSFET Gate-Drive Output. Referenced to PS. GATEPS is a charge pump with a
50礎 pullup current to 5.5V (typ) above V
PS
 when active.
7
GATE2A
Channel A Current-Limiter Switch Gate-Drive Output 2. Referenced to OUTA. Connect GATE2A to
the gate of the second n-channel MOSFET (see the Typical Operating Circuit). GATE2A is a charge
pump with a 50礎 pullup current to 5.5V (typ) above OUTA when active. GATE2A is identical to, but
independent of, GATE1A.
8
OUTA
Channel A Output-Voltage Sense. Connect to the output.
9
GATE1A
Channel A Current-Limiter Switch Gate-Drive Output 1. Referenced to OUTA. Connect GATE1A to
the gate of the first n-channel MOSFET (see the Typical Operating Circuit). GATE1A is a charge
pump with a 50礎 pullup current to 5.5V (typ) above OUTA when active. GATE1A is identical to, but
independent of, GATE2A.
12
SENSEA
Channel A Current-Sense Negative Input. Connect the negative voltage-sensing terminal of a
current-sense resistor, R
SENSEA
, to SENSEA. Connect the positive voltage-sensing terminal of
R
SENSEA
 to PS.
13
BP
Output of Diode OR Connection between PWR and PS. Bypass BP to GND with a 1礔 capacitor.
15
PS
Power Priority Input. Connect to the source of the external QPS FET. The MAX5963 draws most of its
power from PS whenever possible. Bypass PS to GND with a 0.1礔 ceramic capacitor. Ensure that
the bypass capacitance on PS is less than or equal to the bypass capacitance on PWR.
17
CB
Circuit-Breaker Threshold Programming Input. Connect a resistor from PS to CB to program the
circuit-breaker threshold. A capacitor connected from CB to PS is recommended for impedance
matching.
18
CL
Current-Limit Threshold Programming Input. Connect a resistor from PS to CL to program the
current-limit threshold. A capacitor connected from CL to PS is recommended for impedance
matching.
19
OR
ORing Threshold Programming Input. Connect a resistor from PS to OR to program the ORing
current threshold. A capacitor connected from OR to PS is recommended for impedance matching.
20
SENSEB
Channel B Current-Sense Negative Input. Connect the negative voltage-sensing terminal of a
current-sense resistor, R
SENSEB
, to SENSEB. Connect the positive voltage-sensing terminal of
R
SENSEB
 to PS.
22
GATE1B
Channel B Current-Limiter Switch Gate-Drive Output 1. Referenced to OUTB. Connect GATE1B to
the gate of the 1st n-channel MOSFET (see the Typical Operating Circuit). GATE1B is a charge
pump with a 50礎 pullup current to 5.5V (typ) above OUTB when active. GATE1B is identical to, but
independent of, GATE2B.
23
OUTB
Channel B Output-Voltage Sense. Connect to the output.
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