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參數資料
| 型號： | MB91F133PMT2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-Bit RISC Microcontroller |
| 中文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, LQFP-144 |
| 文件頁數： | 20/123頁 |
| 文件大小： | 1362K |
| 代理商： | MB91F133PMT2 |
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MB91133/MB91F133
20
I
HANDLING DEVICES
1.
Points to Note on Handling Devices
(1) Latch-up prevention
Latch-up may occur by CMOS IC if a voltage in excess of V
CC
5 or lower than V
SS
is applied to the input/output
pins, or if the voltage exceeds the rating between V
CC
5 and V
SS
. If latch-up occurs, the electrical current increases
significantly and may destroy certain components due to excessive heat, so great care must be taken to ensure
that the maximum rating is not exceeded during use.
(2) Handling Pins
Handling unused pins
Input pins that are not used should be pulled up or down as they may cause erroneous operations if left open.
Handling N.C. pins
N.C. pins must be opened for use.
Handling output pins
Excessive electric current may flow if the output pin is shorted by the power source or other output pins, or
connected to large loads. If such status is prolonged, the device is liable to be damaged, so great care must
be taken to ensure that the usage volume does not exceed the maximum rating.
Mode pins (MD0 to MD2)
Those pins must be directly connected to V
CC
5 or V
SS
for use.
Pattern lengths between V
CC
5 or V
SS
and each mode pin on the printed-circuit board should be arranged to
be as short as possible to prevent the test mode from being erroneously turned on due to noise, and they
should be connected with low impedance.
Power pins
When there are a number of V
CC
5/V
CC
3/V
SS
, those whose electrical potential must be the same within the
device are connected to prevent erroneous operation such as latch-up for device design purposes, but those
must be externally connected to a power source and earthed to follow the general output current standard and
prevent erroneous operation of strobe signals due to increased ground level and reduction in unnecessary
radiation.
Care must also be taken to ensure that they are connected to the V
CC
5/V
SS
or V
CC
3/V
SS
of this device at the
lowest possible impedance from the source of the electrical current supply.
Furthermore, it is recommended that a ceramic capacitor of around 0.1
μ
F be used to connect the V
CC
5 and
V
SS
, or V
CC
3 and V
SS
near the device as a bypass capacitor.
Crystal oscillation circuits
Noise near the X0, X1, X0A or X1A pins can cause erroneous operation. The printed-circuit board must be
designed so that the X0, X1, X0A and X1A pins, crystal oscillator (or ceramic oscillator) and bypass capacitor
to the ground can be arranged as close as possible.
Also, a printed-circuit board with grounded artwork enclosing the X0, X1, X0A and X1A pins is strongly
recommended to ensure stable operation.
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