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參數(shù)資料
| 型號： | MB91F133PMT2 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-Bit RISC Microcontroller |
| 中文描述： | 32-BIT, FLASH, 33 MHz, RISC MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, LQFP-144 |
| 文件頁數(shù)： | 60/123頁 |
| 文件大小： | 1362K |
| 代理商： | MB91F133PMT2 |
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MB91133/MB91F133
60
Waveform Generation Area
The waveform generation area is configured with 8-bit timer
×
3, 8-bit reload register
×
3, timer control register
×
3 and 8-bit waveform control register. This control circuit controls the waveform of the 16-bit PPG timer and
real-time output, and DC chopper output and non-overlapping 3-phase waveform output to be used for inverter
control are possible.
Non-overlapping pulse output of the PPG timer is possible by setting dead time of the 8-bit timer (dead
time timer function) .
Real timer output is operated by the 2-channel mode and non-overlapping output of the waveform is
possible by setting the dead time of the 8-bit timer (dead time timer function) .
Operation of PPG timer can easily be started/stopped by generating a GATE signal for the PPG timer
operation through match detection of real-time output compare (GATE function).
The 8-bit timer is operated by match detection of real-time output compare, and operation of the PPG timer
can easily be started/stopped by generating a GATE signal for the PPG timer until the 8-bit timer is stopped
(GATE function) .
Pin output can be forcibly controlled by input to the DTTI pin. Pins can be controlled externally even if
oscillations stop due to lack of clocks for inputs to this pin. (Each pin level can be set by the program .)
If this function is used, the port should be set to output (DDR
=
1) and the output value should be
described in the PDR beforehand.
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