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| 型號(hào)： | MC28U512HACA-0QC00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | MultiMediaCard Specification |
| 中文描述： | 多媒體卡規(guī)格 |
| 文件頁(yè)數(shù)： | 22/66頁(yè) |
| 文件大小： | 1422K |
| 代理商： | MC28U512HACA-0QC00 |
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MultiMediaCard
TM
22
4.5.3 Relative Card Address (RCA)
The 16-bit relative card address register carries the card address assigned by the host during the card
identification. This address is used for the addressed host to card communication after the card
identification procedure. The default value of the RCA register is 0x0001. The value 0x0000 is reserved
to set all cards in Standby State with the command SELECT_DESELECT_CARD (CMD7). The RCA is
programmed with the command SET_RELATIVE_ADDRESS (CMD3) during the initialization
procedure. The content of this register is lost after power down. The default value is assigned when an
internal reset is applied by the power up detection unit of the MultiMediaCard.
4.5.4 Card Specific Data (CSD)
The card specific data register describes how to access the card content. The CSD defines card
operating parameters like maximum data access time, data transfer speed.
Table 4-7 CSD Field
Name
Field
Width
CSD structure
CSD_STRUCTURE
2
Spec version
SPEC_VERS
4
Reserved
--
2
Data read access-
time-1
Data read access-
time-2 in CLK
cycles NAC
*
100)
Max. data transfer
rate
Card command
classes
Max. read data
block length
Partial blocks for
read allowed
Write block
misalignment
Read block
misalignment
DSR implemented
DSR_IMP
1
Reserved
--
2
Device size
C_SIZE
12
Max. read current
at V
DD
min
Max. read current
at V
DD
max
Max. write current
at V
DD
min
Max. write current
at V
DD
max
CSD-slice
[127:126]
[125:122]
[121:120]
[119:112]
Value
Type
0x2
0x3
0x0
0 26
(1.5 ms)
0 01
(100 cycles)
read only
read only
read only
read only
TAAC
8
NSAC
8
[111:104]
read only
TRAN_SPEED
8
[103:96]
0 2A
(20MHz,Max)
0 0F5
(Class 0,2,4,5, 6, 7)
0 9(512 bytes)
read only
CCC
12
[95:84]
read only
READ_BL_LEN
4
[83:80]
read only
READ_BL_PARTIAL
1
[79:79]
0x0(Disabled)
read only
WRITE_BLK_MISALIGN
1
[78:78]
0x0(Disabled)
read only
READ_BLK_MISALIGN
1
[77:77]
0x0 (Disabled)
read only
[76:76]
[75:74]
[73:62]
[61:59]
0x0 (Disabled)
0x0
*1
read only
read only
read only
read only
VDD_R_CURR_MIN
3
*2
VDD_R_CURR_MAX
3
[58:56]
*2
read only
VDD_W_CURR_MIN
3
[55:53]
*2
read only
VDD_W_CURR_MAX
3
[52:50]
*2
read only
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