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參數資料
| 型號： | MC28U512HACA-0QC00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | MultiMediaCard Specification |
| 中文描述： | 多媒體卡規格 |
| 文件頁數： | 46/66頁 |
| 文件大小： | 1422K |
| 代理商： | MC28U512HACA-0QC00 |
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MultiMediaCard
TM
46
Tming CMD
n
End to CMD
n+1
Start
(All Modes)
In the case the CMDn command was a last identification command (no more response sent by a card),
then the next CMDn+1 command is allowed to follow after at least Ncc+136(the length of the R2
response) clock periods.
Data Access timing
Data transmission starts with the access time delay tAC (which corresponds to NAC), beginning from the
end bit of the data address command. The data transfer stops automatically in case of a data block
transfer or by a transfer stop command.
Data Read Timing
(Data Transfer Mode)
Data transfer stop command timing
The card data transmission can be stopped using the stop command. The data transmission stops
immediately with the end bit of the stop command.
Timing of Stop Command
(CMD12,Data Transfer Mode)
Single or multiple block write
The host selects one card for data write operation by CMD7. The host sets the valid block length for
block oriented data transfer by CMD16. The host transfers the data with CMD24. The address of the
data block is determined by the argument of this command. This command is responded by the card on
the CMD line as usual. The data transfer from the host starts NWR clock cycles after the card response
was received. The write data have CRC check bits to allow the card to check the transferred data for
transmission errors. The card sends the CRC check information as a CRC status to the host (on the data
line). The CRC status contains the information if the write data transfer was non-erroneous (the CRC
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