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參數資料
| 型號： | MC68160FB |
| 廠商： | MOTOROLA INC |
| 元件分類： | 網絡接口 |
| 英文描述： | ENHANCED ETHERNET INTERFACE TRANSCEIVER |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP52 |
| 封裝： | PLASTIC, TQFP-52 |
| 文件頁數： | 24/30頁 |
| 文件大小： | 372K |
| 代理商： | MC68160FB |
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MC68160 MC68160B MC68160C
24
MOTOROLA ANALOG IC DEVICE DATA
AUI TRANSMIT SWITCHING
Characteristic
Symbol
Min
Typ
Max
Unit
TCLK to ATX Pair Steady State Propagation Delay
t240
t241
t242
t243
t244
–
–
100
ns
Output Differential Rise and Fall Times (Measured directly at device pins)
1.0
–
5.0
ns
ATX Bit Cell Duration center–to–center (Measured directly at device pins)
–
99.5–100.5
–
ns
ATX Half–Bit Cell Duration center–to–boundary (Measured directly at device pins)
–
49.5–50.5
–
ns
ATX Pair Held at Positive Differential at start of Idle (Measured through
transformer)
200
–
–
ns
NOTE:
Load on specified output is a shunt 27
μ
H inductor and 83
resistor.
Figure 38. ATX Transmit Timings
1
0
1
TCLK
TENA
TX
ATX+/–
Differential
(Logic Levels)
0
0
1
1
1
1
1
1
0
0
0
t240
0V
t242
t243
t241
t241
t244
90%
10%
90%
10%
0V
1.5V
70%
AUI RECEIVE SWITCHING
Characteristic
Symbol
Min
Max
Unit
ARX/ACX Differential Input Voltage Range
–
±
318
±
1315
mV
ARX/ACX Differential Input Pulse Width to:
Initiate Data Reception
Inhibit Data Reception
t261
t262
30
–
–
18
ns
RENA Assertion Delay
RENA Deassertion Delay
t266
t267
–
–
100
450
ns
Squelching Characteristics
The receive data pairs and the collision pairs should have the following squelch characteristics:
1. The squelch circuits are on at idle (with input voltage at approximately 0 V differential).
2. If an input is in squelch, pulse is rejected if the peak differential voltage is more positive than –175 mV, regardless of pulse width.
3. A pulse is considered valid if its peak differential voltage is more negative than –300 mV and its width, measured at –285 mV, is > 25 ns.
4. The squelch circuits are disabled by the first valid negative differential pulse on either the AUI receive data or collision pair.
5. If a positive differential pulse occurs on either the AUI receive data or collision pair > 175 ns, end of frame is assumed and squelch circuitry is turned on.
t261/ t262
–175mV
+175mV
ARX+/–
ACX+/–
Differential
Input Voltage
Figure 39. ARX/ACX Timing
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