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參數(shù)資料
| 型號： | MC68HC05P4A |
| 廠商： | Motorola, Inc. |
| 英文描述： | 28-pin MCU (microcontroller unit) based on the MC68HC05P4(28引腳、基于MC68HC05P4升級的8位微控制器單元) |
| 中文描述： | 28引腳單片機（微控制器）的基礎(chǔ)上MC68HC05P4（28引腳，基于MC68HC05P4升級的8位微控制器單元） |
| 文件頁數(shù)： | 38/102頁 |
| 文件大小： | 930K |
| 代理商： | MC68HC05P4A |
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Advance Information
MC68HC05P4A — Rev. 6.0
38
Interrupts
MOTOROLA
Interrupts
2.
STOP — The STOP instruction causes the oscillator to be turned
off and the processor to "sleep" until an external interrupt (IRQ) or
reset occurs.
3.
WAIT or HALT — The WAIT or HALT instruction causes all
processor clocks to stop, but leaves the timer clock running. This
rest state of the processor can be cleared by reset, an external
interrupt (IRQ), or timer interrupt. These individual interrupts have
no special wait vectors. See
6.4 WAIT Instruction
.
4.4 Timer Interrupt
Three different timer interrupt flags cause a timer interrupt when they are
set and enabled. The interrupt flags are in the timer status register
(TSR), and the enable bits are in the timer control register (TCR). Any
of these interrupts will vector to the same interrupt service routine,
located at the address specified by the contents of memory locations
$1FF8 and $1FF9.
4.5 External Interrupt
The IRQ pin drives an asynchronous interrupt to the CPU. An edge
detector flip-flop is latched on the falling edge of IRQ. If either the output
from the internal edge detector flip-flops or the level on the IRQ pin is
low, a request is synchronized to the CPU to generate the IRQ interrupt.
If the edge-sensitive only mask 0ption is selected, the output of the
internal edge detector flip-flop is sampled and the input level on the IRQ
pin is ignored. The interrupt service routine address is specified by the
contents of memory locations $1FFA and $1FFB. A block diagram of the
IRQ function is shown in
Figure 4-2
.
NOTE:
The internal interrupt latch is cleared nine PH2 clock cycles after the
interrupt is recognized (after location $1FFA is read). Therefore, another
external interrupt pulse can be latched during the IRQ service routine.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05P4DW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P4P | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P6 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P6_1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC05P8 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
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