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參數(shù)資料
型號(hào): MC68HC05P4A
廠商: Motorola, Inc.
英文描述: 28-pin MCU (microcontroller unit) based on the MC68HC05P4(28引腳、基于MC68HC05P4升級(jí)的8位微控制器單元)
中文描述: 28引腳單片機(jī)(微控制器)的基礎(chǔ)上MC68HC05P4(28引腳,基于MC68HC05P4升級(jí)的8位微控制器單元)
文件頁(yè)數(shù): 65/102頁(yè)
文件大小: 930K
代理商: MC68HC05P4A
MC68HC05P4A — Rev. 6.0
Advance Information
MOTOROLA
Computer Operating Properly (COP)
65
Advance Information — MC68HC05P4A
Section 9. Computer Operating Properly (COP)
9.1 Contents
9.2
Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
9.3
Resetting the COP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
9.4
COP During Wait or Halt Mode. . . . . . . . . . . . . . . . . . . . . . . . .66
9.5
COP During Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66
9.2 Introduction
This device includes a watchdog computer operating properly (COP)
feature as a mask option. The COP is implemented with an 18-bit ripple
counter. This provides a timeout period of 64 milliseconds at a bus rate
of 2 MHz. If the COP should time out, a system reset will occur and the
device will be re-initialized in the same fashion as a power-on reset
(POR) or external reset.
9.3 Resetting the COP
Preventing a COP reset is done by writing a 0 to the COPR bit. This
action will reset the counter and begin the timeout period again. The
COPR bit is bit 0 of address $1FF0. A read of address $1FF0 will access
the user-defined ROM data at that location.
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相關(guān)代理商/技術(shù)參數(shù)
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