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參數資料
| 型號： | MCM6209CP35 |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 64K x 4 Bit Fast Static RAM |
| 中文描述： | 64K X 4 STANDARD SRAM, 35 ns, PDIP28 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-28 |
| 文件頁數： | 1/8頁 |
| 文件大小： | 175K |
| 代理商： | MCM6209CP35 |
MCM6209C
1
Motorola, Inc. 1995
64K x 4 Bit Fast Static RAM
With Output Enable
The MCM6209C is fabricated using Motorola’s high–performance silicon–gate
CMOS technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.
This device meets JEDEC standards for functionality and pinout, and is avail-
able in plastic dual–in–line and plastic small–outline J–leaded packages.
Single 5 V
±
10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
Fast Access Times: 12, 15, 20, 25, and 35 ns
Equal Address and Chip Enable Access Times
Output Enable (G) Feature for Increased System Flexibility and to
Eliminate Bus Contention Problems
Low Power Operation: 135 – 165 mA Maximum AC
Fully TTL Compatible — Three–State Output
BLOCK DIAGRAM
ROW
DECODER
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
MEMORY ARRAY
256 ROWS x
64 x 4 COLUMNS
A13
A14
A4
A1
A12
A6
A3
A2
DQ3
DQ2
DQ1
DQ0
E
W
G
A8
A11
A10
A15
A9
A7
A5
A0
VSS
VCC
Order this document
by MCM6209C/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MCM6209C
P PACKAGE
300 MIL PLASTIC
CASE 710B–01
J PACKAGE
300 MIL SOJ
CASE 810B–03
PIN NAMES
A0 – A15
DQ0 – DQ3
W
. . . . . . . . . . . . . . . . . . . .
G
. . . . . . . . . . . . . . . . . . .
E
. . . . . . . . . . . . . . . . . . . . . .
NC
. . . . . . . . . . . . . . . . .
VCC
. . . . . . . . . . .
VSS
. . . . . . . . . . . . . . . . . . . . . . .
Address Input
. . . . . . . . . . . . .
Data Input/Data Output
. . .
Write Enable
Output Enable
Chip Enable
No Connection
Power Supply (+ 5 V)
Ground
19
18
17
16
15
28
27
26
25
24
23
22
21
20
NC
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
E
G
VSS
VCC
A15
A14
A13
A12
A10
NC
NC
DQ0
DQ1
DQ2
DQ3
A11
10
11
12
13
14
1
2
3
4
5
6
7
8
9
W
REV 3
5/95
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