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參數資料
| 型號： | MCP9808T-E/MS |
| 廠商： | Microchip Technology |
| 文件頁數： | 19/52頁 |
| 文件大?。?/td> | 1085K |
| 描述： | IC TEMP SENSOR DGTL I2C 8MSOP |
| 標準包裝： | 2,500 |
| 功能： | 溫度監控系統（傳感器） |
| 傳感器類型： | 內部 |
| 感應溫度： | -40°C ~ 125°C |
| 精確度： | ±1°C |
| 拓撲： | ADC（三角積分型），寄存器庫 |
| 輸出類型： | 2 線串行，I²C?/SMBUS? |
| 輸出警報： | 是 |
| 輸出風扇： | 是 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設備封裝： | 8-MSOP |
| 包裝： | 帶卷 (TR) |
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?2011 Microchip Technology Inc.
DS25095A-page 19
MCP9808
bit 7
Crit. Lock: T
CRIT
Lock bit
0 = Unlocked. T
CRIT
register can be written (power-up default)
1 = Locked. T
CRIT
register can not be written
When enabled, this bit remains set to 1 or locked until cleared by an internal Reset (Section 5.3
Summary of Power-on Default ).
This bit can be programmed in Shutdown mode.
bit 6
Win. Lock: T
UPPER
and T
LOWER
Window Lock bit
0 = Unlocked; T
UPPER
and T
LOWER
registers can be written (power-up default)
1 = Locked; T
UPPER
and T
LOWER
registers can not be written
When enabled, this bit remains set to 1 or locked until cleared by a Power-on Reset (Section 5.3
Summary of Power-on Default ).
This bit can be programmed in Shutdown mode.
bit 5
Int. Clear: Interrupt Clear bit
0 = No effect (power-up default)
1 = Clear interrupt output; when read, this bit returns to 0
This bit can not be set to 1 in Shutdown mode, but it can be cleared after the device enters Shutdown
mode.
bit 4
Alert Stat.: Alert Output Status bit
0 = Alert output is not asserted by the device (power-up default)
1 = Alert output is asserted as a comparator/Interrupt or critical temperature output
This bit can not be set to 1 or cleared to 0 in Shutdown mode. However, if the Alert output is config-
ured as Interrupt mode, and if the host controller clears to 0, the interrupt, using bit 5 while the device
is in Shutdown mode, then this bit will also be cleared 0.
bit 3
Alert Cnt.: Alert Output Control bit
0 = Disabled (power-up default)
1 = Enabled
This bit can not be altered when either of the Lock bits are set (bit 6 and bit 7).
This bit can be programmed in Shutdown mode, but the Alert output will not assert or deassert.
bit 2
Alert Sel.: Alert Output Select bit
0 = Alert output for T
UPPER
, T
LOWER
and T
CRIT
(power-up default)
1 = T
A
> T
CRIT
only (T
UPPER
and T
LOWER
temperature boundaries are disabled)
When the Alarm Window Lock bit is set, this bit cannot be altered until unlocked (bit 6).
This bit can be programmed in Shutdown mode, but the Alert output will not assert or deassert.
bit 1
Alert Pol.: Alert Output Polarity bit
0 = Active-low (power-up default; pull-up resistor required)
1 = Active-high
This bit cannot be altered when either of the Lock bits are set (bit 6 and bit 7).
This bit can be programmed in Shutdown mode, but the Alert output will not assert or deassert.
bit 0
Alert Mod.: Alert Output Mode bit
0 = Comparator output (power-up default)
1 = Interrupt output
This bit cannot be altered when either of the Lock bits are set (bit 6 and bit 7).
This bit can be programmed in Shutdown mode, but the Alert output will not assert or deassert.
REGISTER 5-2:
CONFIG: CONFIGURATION REGISTER (?/SPAN> ADDRESS 0000 0001b)
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