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參數資料
| 型號： | MM74HCT193 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | CLAMP |
| 中文描述： | 同步二進制加/減計數器 |
| 文件頁數： | 1/9頁 |
| 文件大小： | 146K |
| 代理商： | MM74HCT193 |
TL/F/5742
M
January 1988
MM54HCT193/MM74HCT193
Synchronous Binary Up/Down Counters
General Description
These high speed synchronous counters utilize advanced
silicon-gate CMOS technology to achieve the high noise im-
munity and low power consumption of CMOS technology,
along with the speeds of low power Schottky TTL. The
MM54HCT193/MM74HCT193 is a binary counter having
two separate clock inputs, an UP COUNT input and a
DOWN COUNT input. All outputs of the flip-flops are simul-
taneously triggered on the low-to-high transition of either
clock while the other input is held high. The direction of
counting is determined by which input is clocked.
This device has TTL compatible inputs. It can drive 15 LS-
TTL loads.
This counter may be preset by entering the desired data on
the DATA A, DATA B, DATA C, and DATA D inputs. When
the LOAD input is taken low, the data is loaded indepen-
dently of either clock input. This feature allows the counter
to be used as a divide-by-n counter by modifying the count
length with the preset inputs.
In addition, the HCT193 can also be cleared. This is accom-
plished by inputting a high on the CLEAR input. All 4 internal
stages are set to a low level independently of either COUNT
input.
Both a BORROW and CARRY output are provided to en-
able cascading of both up and down counting functions. The
BORROW output produces a negative-going pulse when
the counter underflows and the CARRY outputs a pulse
when the counter overflows. The counter can be cascaded
by connecting the CARRY and BORROW outputs of one
device to the COUNT UP and COUNT DOWN inputs, re-
spectively, of the next device.
All inputs are protected from damage due to static dis-
charge by diodes to V
CC
and ground.
Features
Y
Low quiescent supply current: 80
m
A maximum (74HCT
Series)
Y
Low input current: 1
m
A maximum
Y
TTL compatible inputs
Connection Diagram
Dual-In-Line Package
TL/F/5742–1
Order Number MM54HCT193 or MM74HCT193
Truth Table
Count
Clear
Load
Function
Up
u
H
X
X
Down
H
u
X
X
L
L
H
L
H
H
X
L
Count Up
Count Down
Clear
Load
H
e
high level
L
e
low level
u
e
transition from low-to-high
X
e
don’t care
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
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| MM74HCT193J | CLAMP |
| MM74HCT193N | CLAMP |
| MM54HCT573 | TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
| MM54HCT573N | TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
| MM54HCT573WM | TRI-STATE? Octal D-Type Latch / TRI-STATE Octal D-Type Flip-Flop |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MM74HCT193J | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Synchronous Binary Up/Down Counters |
| MM74HCT193N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Synchronous Binary Up/Down Counters |
| MM74HCT193WM | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| MM74HCT240 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer |
| MM74HCT240_05 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer |
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