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Motorola TMOS Power MOSFET Transistor Device Data
Medium Power Surface Mount Products
MiniMOS
devices are an advanced series of power MOSFETs
which utilize Motorola’s TMOS process. These miniature surface
mount MOSFETs feature ultra low RDS(on) and true logic level
performance. They are capable of withstanding high energy in the
avalanche and commutation modes and the drain–to–source diode
has a low reverse recovery time. MiniMOS devices are designed
for use in low voltage, high speed switching applications where
power efficiency is important. Typical applications are dc–dc
converters, and power management in portable and battery
powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor
controls in mass storage products such as disk drives and tape
drives. The avalanche energy is specified to eliminate the
guesswork in designs where inductive loads are switched and offer
additional safety margin against unexpected voltage transients.
Ultra Low RDS(on) Provides Higher Efficiency and Extends
Battery Life
Logic Level Gate Drive — Can Be Driven by Logic ICs
Miniature SO–8 Surface Mount Package — Saves Board Space
Diode Is Characterized for Use In Bridge Circuits
Diode Exhibits High Speed, with Soft Recovery
Avalanche Energy Specified
Mounting Information for SO–8 Package Provided
MAXIMUM RATINGS
(TJ = 25
°
C unless otherwise noted)(1)
Rating
Symbol
VDSS
VGS
ID
Value
25
±
20
3.6
2.5
18
13
– 55 to 150
2.0
Unit
Vdc
Vdc
Adc
Drain–to–Source Voltage
Gate–to–Source Voltage
Drain Current — Continuous
N–Channel
P–Channel
N–Channel
P–Channel
— Pulsed
IDM
Operating and Storage Temperature Range
Total Power Dissipation @ TA= 25
°
C (2)
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25
°
C
(VDD = 20 V, VGS = 10 V, Peak IL = 9.0 A, L = 6.0 mH, RG = 25
)
(VDD = 20 V, VGS = 10 V, Peak IL = 7.0 A, L = 10 mH, RG = 25
)
Thermal Resistance — Junction to Ambient (2)
Maximum Lead Temperature for Soldering, 0.0625
″
from case. Time in Solder Bath is 10 seconds.
DEVICE MARKING
F2C02
(1) Negative signs for P–Channel device omitted for clarity.
(2) Mounted on 2” square FR4 board (1” sq. 2 oz. Cu 0.06” thick single sided) with one die operating, 10 sec. max.
TJ and Tstg
PD
EAS
°
C
Watts
mJ
N–Channel
P–Channel
245
245
62.5
260
R
θ
JA
TL
°
C/W
°
C
ORDERING INFORMATION
Device
Reel Size
13
″
Tape Width
12 mm embossed tape
Quantity
2500 units
MMDF2C02ER2
Designer’s Data for “Worst Case” Conditions
— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Designer’s and MiniMOS are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMDF2C02E/D
COMPLEMENTARY
DUAL TMOS POWER FET
2.5 AMPERES
25 VOLTS
RDS(on) = 0.100 OHM
(N–CHANNEL)
RDS(on) = 0.25 OHM
(P–CHANNEL)
CASE 751–05, Style 14
SO–8
N–Source
N–Gate
P–Source
P–Gate
1
2
3
4
8
7
6
5
Top View
N–Drain
N–Drain
P–Drain
P–Drain
D
S
G
P–Channel
D
S
G
N–Channel
REV 5