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參數資料
型號: MPSA55RL
廠商: ON SEMICONDUCTOR
元件分類: 小信號晶體管
英文描述: 500 mA, 60 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92
封裝: PLASTIC, TO-226AA, 3 PIN
文件頁數: 21/36頁
文件大小: 385K
代理商: MPSA55RL
Reliability and Quality Assurance
9–14
Motorola Small–Signal Transistors, FETs and Diodes Device Data
THERMAL RESISTANCE
Circuit performance and long–term circuit reliabiity are
affected by die temperature. Normally, both are improved by
keeping the junction temperatures low.
Electrical power dissipated in any semiconductor device is
a source of heat. This heat source increases the temperature
of the die about some reference point, normally the ambient
temperature of 25
°C in still air. The temperature increase,
then, depends on the amount of power dissipated in the circuit
and on the net thermal resistance between the heat source
and the reference point.
The temperature at the junction depends on the packaging
and mounting system’s ability to remove heat generated in the
circuit from the junction region to the ambient environment.
The basic formula for converting power dissipation to
estimated junction temperature is:
TJ = TA + PD (θJC + θCA)
(1)
or
TJ = TA + PD (θJA)
(2)
where:
TJ = maximum junction temperature
TA = maximum ambient temperature
PD = calculated maximum power dissipation, including
effects of external loads when applicable
θJC = average thermal resistance, junction to case
θCA = average thermal resistance, case to ambient
θJA = average thermal resistance, junction to ambient
This Motorola recommended formula has been approved
by RADC and DESC for calculating a ‘‘practical’’ maximum
operating junction temperature for MIL–M–38510 devices.
Only two terms on the right side of equation (1) can be
varied by the user, the ambient temperature and the device
case–to–ambient thermal resistance,
θCA. (To some extent
the device power dissipation can also be controlled, but under
recommended use the supply voltage and loading dictate a
fixed power dissipation.) Both system air flow and the package
mounting technique affect the
θCA thermal resistance term.
θJC is essentially independent of air flow and external
mounting method, but is sensitive to package material, die
bonding method, and die area.
For applications where the case is held at essentially a fixed
temperature by mounting on a large or temperature controlled
heat sink, the estimated junction temperature is calculated by:
TJ = TC + PD (θJC)
(3)
where TC = maximum case temperature and the other
parameters are as previously defined.
AIR FLOW
Air flow over the packages (due to a decrease in
θJC)
reduces the thermal resistance of the package, therefore
permitting a corresponding increase in power dissipation
without exceeding the maximum permissible operating
junction temperature.
For thermal resistance values for specific packages, see
the Motorola Data Book or Design Manual for the appropriate
device family or contact your local Motorola sales office.
ACTIVATION ENERGY
Determination of activation energies is accomplished by
testing randomly selected samples from the same population
at various stress levels and comparing failure rates due to the
same
failure
mechanism.
The
activation
energy
is
represented by the slope of the curve relating to the natural
logarithm of the failure rate to the various stress levels.
In calculating failure rates, the comprehensive method is to
use the specific activation energy for each failure mechanism
applicable to the technology and circuit under consideration.
A common alternative method is to use a single activation
energy value for the ‘‘expected’’ failure mechanism(s) with the
lowest activation energy.
相關PDF資料
PDF描述
MPSA55ZL1 500 mA, 60 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92
MPSA06RLRE 500 mA, 80 V, NPN, Si, SMALL SIGNAL TRANSISTOR, TO-92
MPSA64J05Z 1200 mA, PNP, Si, SMALL SIGNAL TRANSISTOR
MPSA64D75Z 1200 mA, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92
MPSA64D74Z 1200 mA, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92
相關代理商/技術參數
參數描述
MPSA55RLRA 功能描述:兩極晶體管 - BJT 100mA 60V PNP RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發射極最大電壓 VCEO:- 40 V 發射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2
MPSA55RLRAG 功能描述:兩極晶體管 - BJT 100mA 60V PNP RoHS:否 制造商:STMicroelectronics 配置: 晶體管極性:PNP 集電極—基極電壓 VCBO: 集電極—發射極最大電壓 VCEO:- 40 V 發射極 - 基極電壓 VEBO:- 6 V 集電極—射極飽和電壓: 最大直流電集電極電流: 增益帶寬產品fT: 直流集電極/Base Gain hfe Min:100 A 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:PowerFLAT 2 x 2
MPSA55T3 制造商:National Semiconductor Corporation 功能描述:TRANSISTOR, BJT, PNP, 60V V(BR) CEO, 500MA I(C), TO-92, FORMED LEADS
MPSA55-T92-B 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:NPN MPSA05 PNP MPSA55
MPSA55-T92-K 制造商:UTC-IC 制造商全稱:UTC-IC 功能描述:NPN MPSA05 PNP MPSA55
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