
MOSA ELECTRONICS
MS8870
DTMF Receiver
-
7
-
852 1633
C
H
1
1
1
1
941 1633
D
H
0
0
0
0
ANY
L
Z
Z
Z
Z
L = LOGIC LOW, H = LOGIC HIGH, Z = HIGH IMPEDANCE
Figure 5. Functional Decode Table
Steering Circuit
Before registration of a decoded tone pair, the receiver
checks for a valid signal duration (referred to as character
recognition condition). This check is performed by an
external RC time constant driven by ESt. A logic high on
ESt causes Vc (see Fig. 6) to rise as the capacitor
discharges.
Provided signal condition is maintained (ESt remains
high) for the validation period (t
GTP
), Vc reaches the
threshold (V
TSt
) of the steering logic to register the tone
pair, latching its corresponding 4-bit code (see Fig. 5) into
the output latch. At this point the GT output is activated
and drives Vc to VDD. GT continues to drive high as long
as ESt remains high. Finally, after a short delay to allow
the output latch to settle, the delayed steering output flag
(StD) goes high, signaling that a received tone pair has
been registered. The contents of the output latch are made
available on the 4-bit output bus by raising the three state
control input (TOE) to a logic high. The steering circuit
works in reverse to validate the interdigit pause between
signals. Thus, as well as rejecting signals too short to be
considered valid, the receiver will tolerate signal
interruptions (drop out) too short to be considered a valid
pause. This facility, together with the capability of
selecting the steering time constants externally, allows the
designer to tailor performance to meet a wide variety of
system requirements.
Guard Time Adjustment
In many situations not requiring selection of tone
duration and interdigital pause, the simple steering circuit
shown in Fig. 6 is applicable. Component values are
chosen according to the formula : t
REC
= t
PD
+ t
GPT
t
ID
= t
DA
+ t
GTA
The value of t
DP
is a device parameter (see table) and
t
REC
is the minimum signal duration to be recognized by
the receiver. A value for C of 0.1
μ
F is recommended
for most applications, leaving R to be selected by the
designer.
Different steering arrangements may be used to select
independently the guard times for tone present (t
GTP
) and
tone absent (t
GTA
). This may be necessary to meet system
specifications which place both accept and reject limits on
both tone duration and interdigital pause. Guard time
adjustment also allows the designer to tailor system
parameters such as talk off and noise immunity. Increasing
t
REC
improves talk-off performance since it reduces the
probability that tones simulated by speech will maintain
signal
condition
long
enough
Alternatively, a relatively short tREC with noisy
environments where fast acquisition time and immunity to
tone drop-outs are required. Design information for guard
time adjustment is shown in Figure 7.
to
be
registered.
Differential Input Configuration
Figure 6. Basic Steering Circuit
Figure 7. Guard Time Adjustment