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參數資料
| 型號： | NBSG53AMNR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS |
| 中文描述： | 53 SERIES, LOW SKEW CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| 封裝： | 3 X 3 MM, QFN-16 |
| 文件頁數： | 2/18頁 |
| 文件大小： | 133K |
| 代理商： | NBSG53AMNR2 |
NBSG53A
http://onsemi.com
2
VTD
CLK
CLK
VTCLK
V
CC
R
VTCLK
D
D
VTD
V
CC
V
EE
SEL
OLS
Q
Q
A
B
C
D
1
2
3
4
Figure 1. BGA16 Pinout
(Top View)
VTD
D
D
VTD
V
CC
R
SEL OLS
V
EE
Q
Q
V
CC
VTCLK
CLK
CLK
VTCLK
5
6
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NBSG53A
Exposed Pad
(EP)
Figure 2. QFN16 Pinout
(Top View)
Table 1. Pin Description
Pin
BGA
QFN
Name
VTCLK
I/O
Description
C2
1
Internal 50 Termination Pin. See Table 4.
C1
2
CLK
ECL, CML,
LVCMOS,
LVDS, LVTTL
Input
Inverted Differential Input.
B1
3
CLK
ECL, CML,
LVCMOS,
LVDS, LVTTL
Input
Noninverted Differential Input.
B2
4
VTCLK
Internal 50 Termination Pin. See Table 4.
A1
5
VTD
Internal 50 termination pin. See Table 4.
A2
6
D
ECL, CML,
LVCMOS,
LVDS, LVTTL
Input
Inverted Differential Input.
A3
7
D
ECL, CML,
LVCMOS,
LVDS, LVTTL
Input
Noninverted Differential Input.
A4
8
VTD
Internal 50 Termination Pin. See Table 4.
D1,B3
9,16
V
CC
Q
Positive Supply Voltage
B4
10
RSECL Output
Inverted Differential Output. Typically Terminated with 50 Resistor to
V
TT
= V
CC
2 V.
C4
11
Q
RSECL Output
Noninverted Differential Output. Typically Terminated with 50 Resistor to
V
TT
= V
CC
2 V.
C3
12
V
EE
OLS*
Negative Supply Voltage
D4
13
Input
Input Pin for the Output Level Select (OLS). See Table 2.
D3
14
SEL
LVECL,
LVCMOS,
LVTTL Input
Select Logic Input. Internal 75 k to V
EE
.
D2
15
R
LVECL,
LVCMOS,
LVTTL Input
Reset D FlipFlop. Internal 75 k to V
EE
.
N/A
EP
Exposed Pad. (Note 1)
1. All V
and V
pins must be externally connected to Power Supply to guarantee proper operation. The thermally exposed pad (EP) on
package bottom (see case drawing) must be attached to a heatsinking conduit.
2. In the differential configuration when the input termination pins (VTD, VTD, VTCLK, VTCLK) are connected to a common termination volt-
age, and if no signal is applied then the device will be susceptible to selfoscillation.
3. When an output level of 400 mV is desired and V
CC
V
EE
> 3.0 V, 2K resistor should be connected from OLS pin to V
EE
.
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相關代理商/技術參數 |
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| NBSG53AMNR2G | 功能描述:觸發器 2.5V/3.3V SiGe Diff Clock/Divider RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| NBSG72A | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V/3.3VSiGe Differential 2 X 2 Crosspoint Switch with Output Level Select |
| NBSG72A_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V/3.3V SiGe Differential 2 x 2 Crosspoint Switch with Output Level Select |
| NBSG72AMN | 功能描述:模擬和數字交叉點 IC 2.5V/3.3V SiGE 2x2 RoHS:否 制造商:Micrel 配置:2 x 2 封裝 / 箱體:MLF-16 數據速率:10.7 Gbps 輸入電平:CML, LVDS, LVPECL 輸出電平:CML 電源電壓-最大:3.6 V 電源電壓-最小:2.375 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 產品:Digital Crosspoint 封裝:Tube |
| NBSG72AMN/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:2.5V/3.3V_SiGe Differential 2 X 2 Crosspoint Switch with Output Level Select |
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