
NCN6000
http://onsemi.com
11
SMART CARD SECTION
(25
°
C to +85
°
C ambient temperature, unless otherwise noted.)
Rating
Symbol
Pin
Min
Typ
Max
Unit
CRD_RST @ CRD_VCC = +5.0 V
Output RESET V
OH
@ Icrd_rst = 20 A
Output RESET V
OL
@ Icrd_rst = 200 A
Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @ Cout = 30 pF
CRD_RST @ Vcc = +3.0 V
Output RESET V
OH
@ Icrd_rst = 20 A
Output RESET V
OL
@ Icrd_rst = 200 A
Output RESET Rise Time @ Cout = 30 pF
Output RESET Fall Time @ Cout = 30 pF
V
OH
V
OL
t
R
t
F
V
OH
V
OL
t
R
t
F
12
CRD_VCC 0.9
0
CRD_VCC 0.9
0
CRD_VCC
0.4
100
100
CRD_VCC
0.4
100
100
V
V
ns
ns
V
V
ns
ns
CRD_CLK @ CRD_VCC = +3.0 V or +5.0 V
CRD_VCC = +5.0 V
Output Frequency (See Note 8)
Output Duty Cycle @ DC Fin = 50%
Output CRD_CLK Rise Time @ Cout = 30 pF
Output CRD_CLK Fall Time @ Cout = 30 pF
Output V
OH
@ Icrd_clk = 20 A
Output V
OL
@ Icrd_clk = 100 A
1%
CRD_VCC = +3.0 V
Output Frequency (See Note 8)
Output Duty Cycle @ DC Fin = 50%
Output CRD_CLK Rise Time @ Cout = 30 pF
Output CRD_CLK Fall Time @ Cout = 30 pF
Output V
OH
@ Icrd_clk = 20 A @ Cout = 30 pF
Output V
OL
@ Icrd_clk = 100 A @ Cout = 30 pF
1%
F
CRDCLK
F
CRDDC
t
R
t
F
V
OH
V
OL
F
CRDCLK
F
CRDDC
t
R
t
F
V
OH
V
OL
13
45
3.15
0
40
1.85
0
5.0
55
18
18
CRD_VCC
+0.5
5.0
60
18
18
CRD_VCC
0.7
MHz
%
ns
ns
V
V
MHz
%
ns
ns
V
V
CRD_I/O @ CRD_VCC = +5.0 V
CRD_I/O Data Transfer Frequency
CRD_I/O Rise Time @ Cout = 30 pF
CRD_I/O Fall Time @ Cout = 30 pF
Output V
OH
@ Icrd_i/o = 20 A
Output V
OL
@ Icrd_i/o = 500 A, V
IL
= 0 V
CRD_I/O @ CRD_VCC = +3.0 V
CRD_I/O Data Transfer Frequency
CRD_I/O Rise Time @ Cout = 30 pF
CRD_I/O Fall Time @ Cout = 30 pF
Output V
OH
@ Icrd_i/o = 20 A
Output V
OL
@ Icrd_i/o = 500 A, V
IL
= 0 V
F
IO
T
RIO
T
FIO
V
OH
V
OL
F
IO
T
RIO
T
FIO
V
OH
V
OL
14
CRD_VCC 0.9
0
CRD_VCC 0.9
0
315
315
0.8
0.8
CRD_VCC
0.4
0.8
0.8
CRD_VCC
0.4
kHz
s
s
V
V
kHz
s
s
V
V
CRD_IO Pull Up Resistor @ PWR_ON = H
R
CRDPU
14
14
20
26
k
Card Detection Debouncing Delay:
Card Insertion
Card Extraction
T
CRDIN
T
CRDOFF
11
50
50
150
150
s
s
Card Insertion or Extraction Positive Going Input
High Voltage
V
IHDET
11
0.70 * Vbat
Vbat
V
Card Insertion or Extraction Negative Going Input
Low Voltage
V
ILDET
11
0
0.30 * Vbat
V
Card Detection Bias Pull Up Current @
Vbat = 5.0 V
I
DET
11
10
A
Output Peak Max Current Under Card Static
Operation Mode @ Vcc = 3.0 V or Vcc = 5.0 V
Icrd_iorst
12, 14
15
mA
Output Peak Max Current Under Card Static
Operation Mode @ Vcc = 3.0 V or Vcc = 5.0 V
Icrd_clk
13
70
mA
8. The CRD_CLK clock can operate up to 20 MHz, but the rise and fall time are not guaranteed to be fully within the ISO7816 specification over
the temperature range. Typically, tr and tf are 12 ns @ CRD_CLK = 10 MHz.