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參數資料
| 型號： | NCP1207DR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩壓器 |
| 英文描述： | PWM Current-Mode Controller for Free Running Quasi-Resonant Operation |
| 中文描述： | 0.5 A SWITCHING CONTROLLER, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數： | 13/18頁 |
| 文件大小： | 202K |
| 代理商： | NCP1207DR2 |
NCP1207
http://onsemi.com
13
If the power consumption budget is really too high for the
DSS alone, connect a diode between the auxiliary
winding and the V
CC
pin which will disable the DSS
operation (V
CC
10 V).
The SOIC package offers a 178
°
C/W thermal resistor.
Again, adding some copper area around the PCB footprint
will help decrease this number: 12 mm
R
JA
down to 100
°
C/W with 35 m copper thickness (1 oz.)
or 6.5 mm
6.5 mm with 70 m copper thickness (2 oz.).
As one can see, we do not recommend using the SO8
package and the DSS if the part operates at high switching
frequencies. In that case, an auxiliary winding is the best
solution.
12 mm to drop
Overload Operation
In applications where the output current is purposely not
controlled (e.g. wall adapters delivering raw DC level), it is
interesting to implement a true shortcircuit protection. A
shortcircuit actually forces the output voltage to be at a low
level, preventing a bias current to circulate in the
Optocoupler LED. As a result, the FB pin level is pulled up
to 4.2 V, as internally imposed by the IC. The peak current
setpoint goes to the maximum and the supply delivers a
rather high power with all the associated effects. Please note
that this can also happen in case of feedback loss, e.g. a
broken Optocoupler. To account for this situation, NCP1207
hosts a dedicated overload detection circuitry. Once
activated, this circuitry imposes to deliver pulses in a burst
manner with a low dutycycle. The system recovers when
the fault condition disappears.
During the startup phase, the peak current is pushed to the
maximum until the output voltage reaches its target and the
feedback loop takes over. This period of time depends on
normal output load conditions and the maximum peak
current allowed by the system. The timeout used by this IC
works with the V
CC
decoupling capacitor: as soon as the
V
CC
decreases from the VCC
OFF
level (typically 12 V) the
device internally watches for an overload current situation.
If this condition is still present when the VCC
ON
level is
reached, the controller stops the driving pulses, prevents the
selfsupply current source to restart and puts all the circuitry
in standby, consuming as little as 330 A typical (I
CC3
parameter). As a result, the V
CC
level slowly discharges
toward 0. When this level crosses 5.3 V typical, the
controller enters a new startup phase by turning the current
source on: V
CC
rises toward 12 V and again delivers output
pulses at the VCC
OFF
crossing point. If the fault condition
has been removed before VCC
ON
approaches, then the IC
continues its normal operation. Otherwise, a new fault cycle
takes place. Figure 28 shows the evolution of the signals in
presence of a fault.
If the fault is relaxed during the V
CC
natural fall down sequence, the IC
automatically resumes.
If the fault still persists when V
CC
reached VCC
ON
, then the controller
cuts everything off until recovery.
Figure 28.
TIME
TIME
TIME
INTERNAL
FAULT FLAG
V
CC
12 V
10 V
5.3 V
DRV
DRIVER
PULSES
FAULT IS
RELAXED
FAULT OCCURS HERE
STARTUP PHASE
REGULATION
OCCURS HERE
LATCHOFF
PHASE
SoftStart
The NCP1207 features an internal 1 ms softstart to soften
the constraints occurring in the power supply during startup.
It is activated during the power on sequence. As soon as V
CC
reaches VCC
OFF
, the peak current is gradually increased
from nearly zero up to the maximum clamping level (e.g.
1.0 V). The softstart is also activated during the
overcurrent burst (OCP) sequence. Every restart attempt is
followed by a softstart activation. Generally speaking, the
softstart will be activated when V
CC
ramps up either from
zero (fresh poweron sequence) or 5.3 V, the latchoff
voltage occurring during OCP.
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