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參數資料
型號: NCP1605DR2G
廠商: ON Semiconductor
文件頁數: 27/32頁
文件大小: 745K
描述: IC PFC CONTROLLER CCM/DCM 16SOIC
標準包裝: 1
系列: Soft-Skip™
模式: 臨界傳導(CRM),間歇導電(DCM)
頻率 - 開關: 250kHz
電流 - 啟動: 12mA
電源電壓: 10 V ~ 20 V
工作溫度: 0°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC
包裝: 標準包裝
其它名稱: NCP1605DR2GOSDKR
NCP1605, NCP1605A, NCP1605B
http://onsemi.com
27
BrownOut Detection
The brownout pin receives a portion of the input voltage
(V
IN
). As V
IN
  is a rectified sinusoid, a capacitor must
integrate the ac line ripple so that a voltage proportional to
the average value of (V
IN
) is applied to the brownout pin.
The brownout block detects too low input voltage
conditions. A hysteresis comparator monitors the Pin 2
voltage. Before operation, the PFC stage is off and the input
bridge acts as a peak detector. Hence, the voltage applied
to Pin 2 is:
V
pin2
+  2
Vac
R
bo2
R
bo1
) R
bo2
.
After the PFC stage has started operation, the input
voltage becomes a rectified sinusoid and the voltage
applied to Pin 2 is:
V
pin2
+
2  2
Vac
p
R
bo2
R
bo1
) R
bo2
,
i.e., about 64% of the previous value. Therefore, the same
line magnitude leads to a V
Pin2
 voltage that is 36% lower
when the PFC is working than when it is off (refer to
Figure 69). That is why the NCP1605 features a 50%
hysteresis (V
BO
L = 50% V
BO
H).
When the circuit starts operation, the input voltage
equates the ac line peak.
Hence,   the   initial   threshold   of   the   BrownOut
comparator, must be the upper one (V
BO
 = V
BO
H = 1 V
when the NCP1605 leaves the off mode).
When a brownout condition is detected, the signal
BO_NOK turns off the circuit (refer to block diagram).
BO_NOK
BO
1 V / 0.5 V
EMI
Filter
Ac line
Vin
Figure 68. BrownOut Block
Figure 69. Typical Input Voltage of a PFC Stage
400
200
0
V
SIN
2
@ Vac
2
@ Vac @ sin(Rt)
R
bo2
C
bo2
R
bo1
R
CS
C
in
-
+
Start of PFC
Operation
Thermal Shutdown (TSD)
An internal thermal circuitry disables the circuit gate
drive and then keeps the power switch off when the junction
temperature exceeds 150_C typically. The output stage is
then enabled once the temperature drops below about
100_C (50_C hysteresis).
The temperature shutdown keeps active as long as the
circuit is not reset, that is, as long as V
CC
 keeps higher than
V
CC
RESET. The reset action forces the TSD threshold to
be the upper one (150癈). This ensures that any cold startup
will be done with the right TSD level.
Output Drive Section
The output stage contains a totem pole optimized to
minimize the cross conduction current during high
frequency operation. The gate drive is kept in a sinking
mode whenever the Undervoltage Lockout is active or
more generally whenever the circuit is off (i.e., when the
Fault Latch of the block diagram is high or when the HV
current   source   is   on).   Its   high   current   capability
(500 mA/+800 mA) allows it to effectively drive high
gate charge power MOSFET.
Reference Section
The circuit features an accurate internal reference
voltage (V
REF
). V
REF
 is optimized to be ?% accurate over
the temperature range (the typical value is 2.5 V). V
REF
 is
the voltage reference used for the regulation and the
overvoltage protection. The circuit also incorporates a
precise current reference (I
REF
) that allows the Overcurrent
Limitation to feature a ?% accuracy over the temperature
range.
OFF Mode
As previously mentioned, the circuit turns off in the
following cases:
" When the high voltage, startup current source charges
the V
CC
 capacitor.
" When one of the following major faults is detected:
" Incorrect feeding of the circuit (UVLO high when
V
CC
<V
CC
OFF, V
CC
OFF equating 9 V typically).
" Excessive die temperature detected by the thermal
shutdown.
" BrownOut condition.
" Undervoltage Protection.
" V
Pin13
 higher than 2.5 V (STDWN of the block
diagram turns high).
Generally speaking, the circuit turns off when the
conditions are not proper for good operation. In this mode,
the controller stops operating. The major part of the circuit
sleeps and its consumption is minimized (< 500 mA).
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