NCT75
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7
Temperature Register
The temperature measured by the parts internal sensor is
stored in this 16-bit read only register. The data is stored in
twos complement format with the MSB as the sign bit. The
8 MSBs must be read frist followed by the 8 LSBs.
Table 10. TEMPERATURE VALUE REGISTER
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
0
0
0
X
X
X
X
Configuration Register
This 8-bit read/write register is used to configure the
NCT75 into its various modes of operation. The different
modes are listed in Table 11 and explained in more detail
below.
Table 11. CONFIGURATION REGISTER
Bit
Configuration
Default Value
D7
Reserved
0
D6
Reserved
0
D5
One-shot Mode
0
D4
Fault-queue
0
D3
Fault-queue
0
D2
OS
/ALERT
Pin Polarity
0
D1
Cmp/Int Mode
0
D0
Shutdown Mode
0
D7: Reserved
Write 0 to this bit.
D6: Reserved
Write 0 to this bit.
D5: One-shot Mode
D5 = 0 Part is in normal mode and converting every
60 ms. (Default)
D5 = 1 Setting this bit puts the part into one-shot mode.
The part is normally powered down in this mode until the
one shot register is written to. Once this register is written
to one conversion is performed and the part returns to its
shutdown state.
D[4:3]: Fault Queue
D4   D3   These   two   bits   determine   how   many
overtemperature conditions occur before the OS
/Alert
pin is triggered. This helps to prevent false triggering of
the output.
0  0 = 1 Fault (Default)
0  1 = 2 Faults
1  0 = 4 Faults
2  1 = 6 Faults
D2: OS
/Alert
pin polarity
This selects the polarity of the OS
/Alert
output pin.
D2 = 0 Output is active low. (Default)
D2 = 1 Output is active high.
D1: Cmp/Int
D1 = 0 Comparator mode. (Default)
D1 = 1 Interrupt mode.
D0: Shutdown
D0 = 0 Normal mode part is fully powered. (Default)
D0 = 1 Shutdown mode all circuitry except for the
SMBus interface is powered down. Write a 0 to this bit to
power up again.
T
HYST
Register
The T
HYST
register stores the temperature hysteresis
value for the overtemperature output. This value is picked to
stop the OS
/Alert
pin from being asserted and de-asserted in
noisy temperature environments. This limit is stored in the
16 bit register in twos complement format. The MSB is the
temperature sign bit. The 8 MSBs must be read first
followed by the 8 LSBs. The default value is +75癈.
Table 12. T
HYST
REGISTER
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
0
1
0
1
1
0
0
0
0
X
X
X
X
T
OS
Register
This register stores the temperature limit at which the part
asserts an OS
/Alert
. Once the measured temperature reaches
this value an alert or overtemperature output is generated.
The data is stored in twos complement format with the MSB
as the sign bit. The 8 MSBs must be read frist followed by
the 8 LSBs. The default limit +80癈.
Table 13. T
OS
REGISTER
MSB
LSB
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
1
0
1
0
0
0
0
0
0
0
0
X
X
X
X