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參數資料
| 型號： | PCM3002E |
| 元件分類： | Codec |
| 英文描述： | 16-/20-Bit Single-Ended Analog Input/Output STEREO AUDIO CODECs |
| 中文描述： | 16-/20-Bit單端模擬輸入/輸出立體聲編解碼器 |
| 文件頁數： | 19/23頁 |
| 文件大小： | 206K |
| 代理商： | PCM3002E |
19
PCM3002/3003
IZD:
Bit 4
DAC Infinite Zero Detection Circuit
Control
This bit enables the Infinite Zero Detection Circuit
in PCM3002. When enabled, this circuit will dis-
connect the analog output amplifier from the delta-
sigma DAC when the input is continuously zero for
65,536 consecutive cycles of BCKIN.
IZD
0
1
Infinite Zero Detection Disabled (default)
Infinite Zero Detection Enabled
OUT:
Bit 3
When set to “1”, the outputs are forced to V
CC
/2
(bipolar zero). In this case, all registers in
PCM3002 hold the present data. Therefore, when
set to “0”, the outputs return to the previous
programmed state.
DAC Output Enable Control
OUT
0
1
DAC Outputs Enabled (default normal operation)
DAC Outputs Disabled (forced to BPZ)
DEM (1:0):Bit 2,1
DAC De-emphasis Control
These bits select the de-emphasis mode as shown
below:
DEM1
DEM0
0
0
1
1
0
1
0
1
De-emphasis 44.1kHz ON
De-emphasis OFF (default)
De-emphasis 48kHz ON
De-emphasis 32kHz ON
MUT:
Bit 0
When set to “1”, both left and right-channel DAC
outputs are muted at the same time. This muting
is done by attenuating the data in the digital filter,
so there is no audible click noise when soft mute
is turned on.
DAC Soft Mute Control
MUT
0
1
Mute Disable (default)
Mute Enable
PROGRAM REGISTER 3
A (1:0):
Bit 10:9
These bits define the address for REGISTER 3:
Register Address
A1
A0
1
1
Register 3
res:
Bit 15:11, 8:6, 4:0
These bits are reserved, and should be set to “0”.
Reserved
PROGRAM REGISTER 2
A (1:0):
Bit 10, 9
Register Address
These bits define the address for REGISTER 2:
A1
A0
1
0
Register 2
res:
Bit 15:11, 6 Reserved
These bits are reserved and should be set to “0”.
Bit 8
ADC Power-Down Control
This bit places the ADC section in the lowest
power consumption mode. The ADC operation is
stopped by cutting the supply current to the ADC
section, and DOUT is fixed to zero during ADC
Power-down mode enable. Figure 8 illustrates the
ADC DOUT response for ADC power-down ON/
OFF. This does not affect the DAC operation.
PDAD:
PDAD
DAC POWER-DOWN
0
1
Power Down Mode Disabled (default)
Power Down Mode Enabled
BYPS:
Bit 7
ADC High-Pass Filter Bypass Control
This bit enables or disables the high-pass filter for
the ADC.
BYPS
0
1
High-Pass Filter Enabled (default)
High-Pass Filter Disabled (bypassed)
PDDA:
Bit 6
This bit places the DAC section in the lowest power
consumption mode. The DAC operation is stopped
by cutting the supply current to the DAC section
and V
OUT
is fixed to GND during DAC Power-
Down Mode enable. Figure 8 illustrates the DAC
V
OUT
response for DAC Power-Down ON/OFF.
This does not affect the ADC operation.
DAC Power-Down Control
PDDA
0
1
Power-Down Mode Disabled (default)
Power-Down Mode Enabled
ATC:
Bit 5
When set to “1”, the REGISTER 0 attenuation
data can be used for both DAC channels. In this
case, the REGISTER 1 attenuation data is ig-
nored.
DAC Attenuation Channel Control
ATC
0
1
Individual Channel Attenuation Data Control (default)
Common Channel Attenuation Data Control
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PCM3002E | 制造商:Texas Instruments 功能描述:AUDIO CODEC IC 制造商:Texas Instruments 功能描述:IC, AUDIO CODEC, 20BIT, 48KHZ, SSOP-24 |
| PCM3002E/2K | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3002E/2KG4 | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3002EG | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| PCM3002EG/2K | 功能描述:接口—CODEC 16/20-Bit Sngl-end Anlg I/O Ster Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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