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參數資料
| 型號： | PHU78NQ03LT |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | JFETs |
| 英文描述： | N-channel TrenchMOSTM logic level FET |
| 中文描述： | 75 A, 25 V, 0.0135 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-251 |
| 封裝： | PLASTIC, IPAK-3 |
| 文件頁數： | 5/12頁 |
| 文件大小： | 85K |
| 代理商： | PHU78NQ03LT |
9397 750 15086
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 05 — 9 June 2005
5 of 12
Philips Semiconductors
PHP78NQ03LT
N-channel TrenchMOS logic level FET
6.
Characteristics
Table 5:
T
j
= 25
°
C unless otherwise specified.
Symbol
Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
Characteristics
Conditions
Min
Typ
Max
Unit
I
D
= 250
μ
A; V
GS
= 0 V
T
j
= 25
°
C
T
j
=
55
°
C
I
D
= 1 mA; V
DS
= V
GS
;
Figure 9
and
10
T
j
= 25
°
C
T
j
= 175
°
C
T
j
=
55
°
C
V
DS
= 25 V; V
GS
= 0 V
T
j
= 25
°
C
T
j
= 150
°
C
V
GS
=
±
15 V; V
DS
= 0 V
V
GS
= 5 V; I
D
= 25 A;
Figure 6
and
8
T
j
= 25
°
C
T
j
= 175
°
C
V
GS
= 10 V; I
D
= 25 A;
Figure 6
and
8
25
22
-
-
-
-
V
V
V
GS(th)
gate-source threshold voltage
1
0.5
-
1.5
-
-
2
-
2.2
V
V
V
I
DSS
drain-source leakage current
-
-
-
-
-
10
10
500
100
μ
A
μ
A
nA
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
-
-
-
11.5
20.7
7.65
13.5
24.3
9
m
m
m
Dynamic characteristics
Q
G(tot)
total gate charge
Q
GS
gate-source charge
Q
GD
gate-drain (Miller) charge
C
iss
input capacitance
C
oss
output capacitance
C
rss
reverse transfer capacitance
t
d(on)
turn-on delay time
t
r
rise time
t
d(off)
turn-off delay time
t
f
fall time
Source-drain diode
V
SD
source-drain (diode forward) voltage I
S
= 25 A; V
GS
= 0 V;
Figure 12
t
rr
reverse recovery time
Q
r
recovered charge
I
D
= 50 A; V
DS
= 15 V; V
GS
= 5 V;
Figure 11
-
-
-
-
-
-
-
-
-
-
13
4.8
4.2
1074
389
156
20
92
30
40
-
-
5.6
-
-
-
33
130
48
60
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
Figure 13
V
DS
= 15 V; R
L
= 0.6
; V
GS
= 10 V;
R
G
= 5.6
-
-
-
0.95
40
32
1.2
-
-
V
ns
nC
I
S
= 20 A; dI
S
/dt =
100 A/
μ
s; V
GS
= 0 V;
V
R
= 25 V
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