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參數資料
| 型號： | PSD913515JIT |
| 廠商： | 意法半導體 |
| 英文描述： | BBG ECL/TTL CLOCK DRVR; Package: 28 LEAD PLCC; No of Pins: 28; Container: Rail; Qty per Container: 37 |
| 中文描述： | Flash在系統可編程ISP的外設的8位微控制器 |
| 文件頁數： | 45/110頁 |
| 文件大小： | 1737K |
| 代理商： | PSD913515JIT |
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PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
PSD Interface to a Non-Multiplexed 8-Bit Bus
Figure
20
shows an example of a system using a
MCU with an 8-bit non-multiplexed bus and a
PSD. The address bus is connected to the ADIO
Port, and the data bus is connected to Port A. Port
A is in tri-state mode when the PSD is not access-
ed by the MCU. Should the system address bus
exceed sixteen bits, Ports B, C, or D may be used
for additional address inputs.
Data Byte Enable Reference
MCUs have different data byte orientations. Table
17
shows how the PSD interprets byte/word oper-
ations in different bus WRITE configurations.
Even-byte refers to locations with address A0
equal to '0' and odd byte as locations with A0 equal
to ’1.’
MCU Bus Interface Examples
Figure
21
through
25
show examples of the basic
connections between the PSD and some popular
MCUs. The PSD Control input pins are labeled as
to the MCU function for which they are configured.
The MCU bus interface is specified using the PS-
Dsoft Express Configuration.
Table 17. Eight-Bit Data Bus
Figure 20. An Example of a Typical 8-bit Non-Multiplexed Bus Interface
BHE
A0
D7-D0
X
0
Even Byte
X
1
Odd Byte
MCU
WR
RD
BHE
ALE
RESET
D[7:0]
A[15:0]
A[23:16]
D[7:0]
ADIO
PORT
PORT
A
PORT
B
PORT
C
WR (CNTRL0)
RD (CNTRL1)
BHE (CNTRL2)
RST
ALE (PD0)
PORT D
(OPTIONAL)
PSD
AI02879C
相關PDF資料 |
PDF描述 |
|---|---|
| PSD913515JT | 1:9 Clock Driver; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500 |
| PSD913515MIT | BBG ECL/TTL CLOCK DRVR; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500 |
| PSD913515MT | BBG ECL/TTL CLOCK DRVR; Package: 28 LEAD PLCC; No of Pins: 28; Container: Rail; Qty per Container: 37 |
| PSD913520JIT | ECL/TTL Clock Driver; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500 |
| PSD913520JT | BBG ECL/TTL CLOCK DRVR; Package: 28 LEAD PLCC; No of Pins: 28; Container: Tape and Reel; Qty per Container: 500 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| PSD913515JT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913515MIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913515MT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913520JIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD913520JT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
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